Trends in Embedded Systems

Table of Contents

Introduction - The Evolution of Networked Embedded Systems3
What this means for MCU architectures5
Trends in Embedded Connectivity7
USB 2.0 Interface7
Ethernet 10/100 MAC8
CAN Interface9
Are High Speed Data Transfers Possible? How to Transfer Data Fast Enough?12
Networking Mandates Data SecurityError! Bookmark not defined.
AES Encryption15
DES/Triple DES16
Encryption and the Peripheral Data Controller17
Support for Real-time Applications17
Deterministic Processing18
Interrupt Control18
Atomic Bit Manipulation18
Supervisory Functions19
Single Power Supply19
Conclusion20

Introduction - The Evolution of Networked Embedded Systems
Embedded systems used to be system control oriented – deeply embedded inside end products and not connected to the outside world. The microcontroller worked in a fairly closed system polling peripherals, collecting data, performing simple processing and turning switches and LEDs on and off. There was limited data manipulation or data transfer. They were not connected to a LAN or the Internet. Security was not an issue.

That’s changed.

Today, embedded systems are more likely to be connected to local area networks, with dozens or even hundreds of controllers networked together. Consider controller area networks (CAN) in autos and industrial control that can have up to one hundred microcontrollers interacting with each other. ZigBee wireless control networks can have thousands of interlinked nodes. As embedded networking becomes more complex, they require higher bandwidth and must cover longer distances. Embedded networks are finding their way into industrial control, building automation, medical and security applications.

Localized embedded networks are increasingly connected to the outside world via corporate intranets, extranets or, most significantly, the Internet. Extensive networking of embedded systems mandates increased connectivity for microcontrollers, increased program and data memory to support communications protocols, increased performance and bandwidth to move the data and foolproof security.

In a world in which CAN, Ethernet or ZigBee networks are being monitored or controlled from intranets or the Internet, embedded microcontrollers will have to support Ethernet 10/100, CAN, ZigBee, and possibly other networking protocols. They will need advanced security and encryption algorithms.

Another factor affecting embedded systems is the incredibly fast adoption of the universal serial bus (USB), particularly in the PC and PC peripheral areas. Unlike the conventional UART interface that provides a rudimentary communication link, USB is a plug-and-play standard with a rich set of built-in class drivers. USB shortens development cycles and equipment installation time. Designers like it. And end-users like it because it’s no longer necessary for end-users to load a new driver for every peripheral they buy.

Expect to see USB gain ground in embedded systems for all these reasons and also for the simple reason that notebook computers are used for system setup and field service on copiers, vending machines, ATMs, factory automation, home security systems and the like. Newer notebooks now rely on USB exclusively. The systems they service will have to have USB ports as well or they will have to be serviced with obsolete PCs or USB adapters.

Finally, the growing use of external networks to control and monitor embedded systems mandates increased security - especially if the embedded system is accessible via the Internet or a wireless connection. Nobody wants a nefarious outsider disabling the security system, turning off the fire alarm, or spinning the valves in an oil pipeline. Thus, security has become paramount to embedded system design.

What this means for MCU architectures
The evolution of embedded systems to embedded networks radically changes the architectural attributes one must consider when selecting a microcontroller. The MCU must interface to multiple networking protocols. It must be able to transfer and verify large amounts of data. It must provide security. It must have sufficient memory density and processing power to accommodate all the various protocol stacks and, in many cases, it must do these tasks while consuming a minimal amount of power. Eight- and 16-bit microcontrollers are simply not up to the task in terms of memory resources or processing throughput, and many designers are migrating their designs to 32-bit machines. However, these embedded systems still need the deterministic performance and supervisory functions offered on 8- and 16-bit MCUs that are only rarely available on 32-bit microcontrollers. These cost-sensitive systems also require prices comparable to those charged for 8- or 16-bit MCUs and familiar tool flows that are equally affordable.

Several microcontroller vendors, including Atmel, Philips and ST are addressing these issues by introducing 32-bit ARM-based microcontrollers with high performance, low prices and high-density flash and SRAM memories. More is needed, however, to accommodate the increased connectivity of the embedded market AND support the real-time aspect of these applications. Embedded microcontrollers need to support multiple communication protocols, high-speed data transfers, security, and deterministic processing, if they are to meet the needs of today’s connected applications.

Atmel’s SAM7 family of USB-connected, ARM-based microcontrollers is making inroads into this area with it newest SAM7X microcontrollers. These 50 MIPS MCUs are “connected” with on-chip Ethernet and CAN communications protocols, hardware-based AES/3DES encryption/decryption, secure key storage, and a host of external interfaces that includes USB, USART, SPI, SSC/I2S and TWI. A peripheral DMA controller enables high-speed data transfers independently, without using the ARM7 processor. This microcontroller also has all the real-time system control functions routinely offered on 8- and 16-bit devices, but rarely found on 32-bit machines, including power on reset, brownout detection, real-time clock, and watchdog timers. Other peripherals include a 10-bit ADC, PWM, and power management controller. SAM7X memory densities range from 128- to 256 Kbits of flash memory and 32- to 64-Kbits of SRAM.

This feature set is beginning to truly address the needs of embedded networks.

Trends in Embedded Connectivity
In environments where the number of networked devices is increasing rapidly, cable lengths and bandwidth requirements increase exponentially. Lower bandwidth networks, such as CAN which has a maximum bandwidth of 1Mbps, are facing their limits and are beginning to be replaced by higher bandwidth 100 Mbps Ethernet networks. However, CAN will remain a factor in embedded networks for sometime, and ZigBee is expected to make substantial inroads into low data rate control applications. For communication with a PC, USB has become the standard.

Ethernet is the most widely used and best understood networking protocol around. Extending it into the embedded space offers a great opportunity to provide seamless communications within the local network and with the Internet. Since both Ethernet and the Internet use the TCP/IP communication protocol, implementing Ethernet in the local network eliminates the need for protocol conversions (e.g. when connecting a remote sensor to a PC via the Internet), and greatly reduces network complexity, while increasing device interoperability.

The only wrinkle is that, using a public communication network, such as the Internet radically increases the need for security. Advanced encryption algorithms and secure keys are mandatory.

USB 2.0 Interface
Universal Serial Bus, or USB, is a computer standard designed to provide a true plug-and-play solution for connecting peripherals to a PC. As a result USB has displaced the serial UART connection on PCs. Additionally it provides higher data transfer rates than a UART, up to 12Mbps in full speed mode.

Atmel’s SAM7 microcontrollers offer a fully compliant, full speed USB 2.0 interface that can directly connect the embedded system with a personal computer used for maintenance and field updates. The SAM7X USB port has six end points, a 1352-Byte dual port SRAM that supports isochronous endpoints, and comes with Human Interface Device (HID), Communication Device Class (CDC), and Mass Storage Class Drivers.

Ethernet 10/100 MAC
As the Ethernet protocol reaches deeper into the embedded world, it will become a mandatory component of embedded systems networks. The SAM7X’s 10/100-Mbps IEEE 802.3-compliant Ethernet media-access controller (MAC) can be configured in full- or half-duplex modes. It has a dedicated DMA controller that ensures maximum 100 Mbps throughout, programmable interpacket gap, support for virtual-LAN tagged frames and automatic-pause frame generation and termination. A dual mode interface allows the SAM7X to connect seamlessly through either a Media Independent Interface (MII) or a Reduced Media Independent Interface (RMII) interface, allowing a large selection of PHYs in Fast Ethernet applications,. Where the MII offers a wider choice of PHYs, the RMII frees I/Os on the microcontroller for the application. SAM7X MCUs can be interfaced directly with POS-PHY Level 2/SPI-3-compliant devices, including standard network processors. The SAM7X EMAC offers lossless flow-control via on-chip system buffers, eliminating the need for external memory. A flow-control mechanism reduces port congestion and traffic loss. Jumbo frames of up to 10240 bytes are supported.

An address checker recognizes four specific 48-bit addresses and contains a 64-bit hash register for matching multicast and unicast addresses. It can recognize the broadcast address of all ones, copy all frames, and act on an external address match signal.

A statistics register block contains registers for counting various types of events associated with transmit and receive operations. These registers, along with the status words stored in the receive buffer list, enable the software to generate network management statistics compatible with IEEE 802.3.

The DMA controller connects to memory through the SAM7X Advanced System Bus (ASB) bus interface. It contains 28-byte receive and transmit FIFOs for buffering frame data. It loads the transmit FIFO and empties the receive FIFO using ASB bus master operations. Receive data is not sent to memory until the address checking logic has determined that the frame should be copied. Receive or transmit frames are stored in one or more buffers. Receive buffers have a fixed length of 128 bytes. Transmit buffers range in length between 0 and 2047 bytes, and up to 128 buffers are permitted per frame. The DMA block manages the transmit and receive frame buffer queues. These queues can hold multiple frames.

Frame data is transferred to and from the Ethernet MAC through the DMA interface. All transfers are 32- bit words and may be single accesses or bursts of 2, 3 or 4 words. Burst accesses do not cross sixteen-byte boundaries. Bursts of 4 words are the default data transfer; single accesses or bursts of less than four words may be used to transfer data at the beginning or the end of a buffer.

At 100 Mbps, it takes 960 ns to transmit or receive 12 bytes of data. In addition, six master clock cycles should be allowed for data to be loaded from the bus and to propagate through the FIFOs. For a 60 MHz master clock this takes 100 ns, making the bus latency requirement 860 ns.

CAN Interface
Atmel’s SAM7X microcontrollers include a seamless interface to ISO 1 1898 and ISO 11519-2 Control Area Networks (CANs). The Controller Area Network (CAN) is a multi-master serial communication protocol that efficiently supports secure real-time control with bit rates up to 1 Mbit/s. CAN is a broadcast communication network that uses a message oriented transmission protocol. These messages are identified by using a message identifier. Such a message identifier has to be unique within the whole network and it defines not only the content but also the priority of the message. The priority at which a message is transmitted, compared to another less urgent message, is specified by the identifier of each message. The priorities are laid down during system design in the form of corresponding binary values and cannot be changed dynamically. The identifier with the lowest binary number has the highest priority. Bus access conflicts are resolved by bit-wise arbitration on the identifiers involved by each node observing the bus level bit for bit. This happens in accordance with the "wired and" mechanism, by which the dominant state overwrites the recessive state. The competition for bus allocation is lost by all nodes with recessive transmission and dominant observation. All the "losers" automatically become receivers of the message with the highest priority and do not re-attempt transmission until the bus is available again. The CAN protocol supports two message frame formats, one with an 11-bit identifier and an extended frame version (CAN 2.0) with a 29-bit identifier. It is used commonly in automobile and industrial networks.

The SAM7X CAN interface can handle all types of frames (Data, Remote, Error and Overload) and achieves a bit rate of 1-Mbit/sec at 8 MHz.

CAN controller accesses are made through configuration registers. Eight independent message objects (mailboxes) are implemented. Any mailbox can be programmed as a reception buffer block (even non-consecutive buffers). For the reception of defined messages, one or several message objects can be masked without participating in the buffer feature. An interrupt is generated when the buffer is full. According to the mailbox configuration, the first message received can be locked in the CAN controller registers until the application acknowledges it, or this message can be discarded by new received messages. Any mailbox can be programmed for transmission. Several transmission mailboxes can be enabled at the same time. A priority can be defined for each mailbox independently. An internal 16-bit timer is used to stamp each received and sent message. This timer starts counting as soon as the CAN controller is enabled. This counter can be reset by the application or automatically after a reception in the last mailbox in Time Triggered Mode. The CAN controller offers optimized features to support the Time Triggered Communication (TAC) protocol.
The CPU reads or writes data or messages via the CAN controller mailboxes. An identifier is assigned to each mailbox. The CAN controller encapsulates or decodes data messages to build or to decode bus data frames. Remote frames, error frames and overload frames are automatically handled by the CAN controller under supervision of the software application.