On-card power system design

Dave Cooper Applications Manager, Potentia Semiconductor

It's no secret that on-card power systems are rapidly increasing in complexity. Leading edge ICs are demanding lower and lower voltages and multiple voltage rails that must be applied in the correct sequence. At the same time, the current they consume continues to increase, making the power designer's task increasingly difficult.

Very low voltages at high currents cannot be distributed efficiently from a single, central power supply. Instead, distributed power systems using point-of-load (POL) power converters have become the norm. A relatively high voltage is distributed through the backplane or motherboard, and each of the cards in the system includes DC-DC converters to reduce the backplane voltage to the low voltages needed by the ICs. High efficiency can be achieved with this approach. The downside however is that each card designer now has the task of designing a power system for that card.

For equipment using 12V or 5V backplane voltages, the continual increases in power levels and resulting high backplane currents are difficult to manage. Most large systems therefore distribute a higher voltage to reduce current and improve power efficiency. The telecom standard of ‑48V has been adopted in a wide range of applications such as compute servers, industrial products and military systems, often with duplicated ‑48V feeds to provide redundancy for high-availability applications.

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One important consequence of using a higher backplane voltage is that each card must provide isolation between the primary side (the ‑48V input) and the secondary side, both for safety and to avoid unwanted ground current paths.

Requirements of on-card power system

Most on-card power systems are based on an architecture that uses modular DC-DC converters as building blocks. Very high performance DC-DC converter modules are available from a wide range of suppliers, both as isolated bricks and as non-isolated POLs.

Figure 1 shows a typical 48V power system using a single brick to generate a 12V intermediate bus that feeds a number of POL converters. Using these modules dramatically simplifies the task of designing a high performance power system. There is however a lot more to the power system than the DC-DC converters themselves.

On the primary side, the power system must meet regulatory objectives for safety and EMI, as well as supporting system requirements such as hot swap and power redundancy. The major requirements usually include the following:

· Inrush current limiting to allow cards to be replaced without causing disruption to other cards in the system (hot swap).

· Input undervoltage detection and shutdown.

· Input overcurrent protection.

· Combining diodes to allow use of two redundant power feeds (ORing function).

· Input filtering to meet EMI requirements.

· Input capacitors for energy storage and system stability.

On the secondary side, a power management function is necessary to tie the building blocks together into a fully operational, robust power system. Some of the main aspects that must be addressed by the power management function include the following:

Each DC-DC converter behaves independently, and the power management function must coordinate sequencing and tracking relationships between rails during startup and shutdown.

All outputs must be monitored to correctly shut down all rails in the event of a fault on any rail.

Output voltage adjustment must be provided where necessary, for trimming and margin testing, preferably under software control.

And for high-performance applications there are additional considerations:

System software should be able to read out the power system parameters remotely, particularly in redundant systems.

Primary side monitoring from the secondary side can significantly improve system performance by detecting latent faults before they cause system outages.

In a high performance card with many output rails, design of the power system becomes a complex task. This article looks at the various power system functions, considers the design issues to be addressed on both primary and secondary sides and presents a design example illustrating the use of digitally configurable power management ICs.

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Primary side power management functions

The main primary side power management requirements include inrush current limiting (hot swap), input undervoltage shutdown, and input overcurrent protection. Other primary side monitoring functions can be useful in high performance applications, such as measurement of input voltage and input current, detection of overvoltage, brownout or overcurrent conditions, and detection of fuse failure. In this case, the monitored primary side parameters must be transmitted to the secondary side while maintaining the isolation.

Inrush current limiting

The inrush current limiter prevents excessive current surges during hot swap of the card, and can also function as an electronic circuit breaker to provide over-current protection. For an on-card power system, an active inrush limiter is normally used. Active inrush limiters use a MOSFET and current sense resistor in series with the input, with a control circuit to drive the MOSFET. Passive inrush limiter circuits using an inductor or PTC thermistor may be adequate for very low power cards but are not suitable for typical applications. To be effective, there must not be any significant capacitance before the inrush limiter, apart from small capacitors (typically 0.1uF or less in total) used for very high frequency filtering. The limiter should be connected before the main EMI filter as shown in Figure 1, to limit current into the EMI filter capacitors.

For most applications, the inrush limit current can be set to approximately twice the maximum continuous card current. The MOSFET must have an energy rating (I2T) high enough to handle the inrush current surge. The energy dissipated in the MOSFET during the inrush surge is equal to the energy stored in the input capacitors (E=1/2 CV2). If the input capacitance is large, it may be necessary to include a timeout in the inrush control circuit to protect the MOSFET under worst case conditions. In this way the inrush limiter can charge the input capacitors in two or more successive pulses without exceeding the MOSFET ratings.

Low input shutdown

In a system powered from a 48V battery plant, the input voltage slowly drops during an AC power outage. In order to avoid damage to the battery it is necessary to shut down the power converters when the input voltage reaches a preset UV threshold. Although most intermediate bus bricks include an internal low input shutdown, it is normally preferred to control the shutdown externally to achieve a more precise control of the shutdown voltage. For convenience, input UV shutdown is often combined with the inrush limit control, using a single IC.

The actual input UV threshold voltage is critical, and must be accurately set:

· It must be low enough to meet the system specification, which usually requires operation down to 40V in a telecom application. Since this requirement applies at the main input feed to the equipment, the UV threshold at each card must be lower than 40V to allow for voltage drop in ORing diodes, fuses, distribution wiring, etc., typically at least 1.5V.

· Since most intermediate bus bricks are only specified to operate down to 36V minimum, the UV threshold must be above 36V. A typical UV shutdown threshold could be 38V +/- 0.5V, measured at the inrush limiter.

· The UV shutdown must have hysteresis to prevent rapid cycling. Typically, about 3V hysteresis is adequate, with restart at about 41V.

Note: although telecom standards require operation down to 40V, there is no need to restart at the same voltage. When the AC returns after an outage, the battery voltage very quickly rises above 40V as the batteries start to charge.

Input overcurrent protection

Input fuses are required to meet safety approval, and must be used at the input of each card. For dual redundant feeds, separate fuses are needed for each feed. Fuses must have suitable voltage rating (typically a minimum of 80V DC for 48V telecom systems), and must have adequate interrupt current rating to handle the worst case fault current. Fault currents can be very high in large battery systems, due to the very low impedance distribution network. Surface mount fuses with an interrupt rating of 10,000A are available from several suppliers and are recommended for telecom applications.

Although the fuses provide basic overcurrent protection under major fault conditions, an electronic circuit breaker offers a much more precise trip point and can provide fast protection against overloads. This type of circuit breaker can be extremely fast, but it is recommended to include a few milliseconds time delay to avoid unwanted nuisance tripping under transient conditions. The MOSFET used for inrush limiting can double as a circuit breaker, using the same overcurrent threshold and timeout. In this way, no added components are required.

Primary side monitoring

In addition to the basic functions described above, other primary side monitoring can include measurement of input voltage and input current, detection of fuse failure, and alarms for overvoltage, brownout or overcurrent. As indicated in Figure 1, the monitoring function must also provide isolation, to allow reporting of primary side status information through the secondary side interface. Simple primary side status information can be isolated using an optocoupler. For more complete monitoring including measured voltage and current, an inexpensive transformer-isolated datalink can be used.

Secondary side power management functions

The major secondary side power management functions include startup and shutdown sequencing control, output voltage monitoring, OV and UV protection, and voltage margin control. Other functions such as temperature monitoring or remote readout of voltage and current can be useful in high performance applications.

Startup and shutdown sequencing

Many of today’s complex integrated circuits require more that one power rail, and these rails must be applied in the correct sequence at startup to avoid possible latchup or permanent damage. In some cases the rails must also be shut down in the reverse sequence to avoid possible damage. When each power rail is derived from a separate POL converter, it is critical to properly coordinate the POLs through an overall card power sequencing control scheme. The precise requirements depend on the ICs used on the card, and can be obtained from the manufacturer’s datasheets. If several ICs use the same voltages but have conflicting sequencing requirements, it may be necessary to use separate POLs for each IC.

Sequence control

There are several ways to implement such a sequence controller:

· A fixed RC time delay can be added at the enable pin of each POL. This is very simple to implement and may work in the lab, but it does not guarantee correct sequencing under all conditions. If one POL takes longer than expected to start, or if it has failed, the next POL does not wait until the first one has started; there is no protection if input power fails, or if the card is removed, part way through the startup sequence; and an RC time delay cannot control shutdown sequencing.

· A simple interlocking scheme can be used, where the output voltage of each POL must reach a preset threshold before it sends an enable signal to the next POL. The interlock circuit can be based on comparators with a voltage reference, or can use optocouplers. Interlocking in this way guarantees startup in the correct sequence, but does not easily control shutdown sequencing.

· A microcontroller can be used to implement sequencing by driving each POL enable input and measuring each POL output voltage using an internal ADC. Software in the microcontroller ensures that the proper sequence is followed at startup, and can also control shutdown sequencing. (Of course, full control of shutdown sequencing requires sufficient energy storage on the card to maintain the POLs, and the microcontroller itself, operating during the shutdown time.) However, the microcontroller software requires significant development effort, and the microcontroller can be expensive.

· A dedicated power management IC can be used instead of a microcontroller. This type of IC is designed specifically to control power sequencing, and includes all the required digital logic. Parameters such as startup and shutdown sequence, time delays and interlock voltages can be easily configured through an interactive GUI. No software development is required, saving time and effort and greatly reducing the risk of design errors. This type of IC often includes added features designed specifically for power applications, such as temperature measurement, status readout and fault logging

Voltage tracking

Some ICs require a precisely controlled relationship between voltage rails, usually referred to as voltage tracking. If voltage tracking is needed, the simplest solution is to use POLs specifically designed for this purpose. This type of POL has a single tracking pin that links into its internal feedback loop. By interconnecting the tracking pins of several POLs as shown in Figure 2, the output voltages automatically track together during startup and shutdown, as indicated in Figure 3. A single enable input as shown in Figure 2 allows both POLs to be started or shut down together from the overall power system controller. Choice of RC values allows very simple control of the tracking voltage ramp at startup and shutdown.

This technique is almost always preferable to the use of controlled MOSFET switches in the output rails, particularly at low voltage and high current where the MOSFET voltage drop becomes very significant.

Output monitoring

If a fault occurs on any of the POLs on a card, it is important to shut down all the POLs in a controlled manner, to avoid propagating the fault. This requires monitoring all outputs for overvoltage (OV) and undervoltage (UV) conditions. It is also desirable to shut down the intermediate bus brick, particularly when an output OV condition is due to an unrecoverable fault.

Note: an unrecoverable secondary side fault can occur in any power system using non-isolated POL DC-DC converters. This is because most POLs use a buck topology in which the output voltage is controlled by varying the duty cycle of an upper and lower switching FET. If the upper FET fails short-circuit, the output voltage becomes equal to the input and cannot be controlled except by removing the input voltage.

The output monitoring circuit should be independent of the POLs themselves, to ensure that any component fault does not remain undetected. For example, if the voltage reference in the POL fails it can cause the output voltage to go outside spec limits. If the same reference is used in an internal OV or UV detection circuit, the OV or UV detection threshold will also change and the fault will not be detected. It can be useful to have additional OV and UV thresholds to provide an advanced warning to the system, before a shutdown occurs. This is particularly useful in the case of a UV alarm, which can indicate an overload condition where a POL momentarily reaches the point of current limiting.

The precise OV and UV detection thresholds will depend on the system requirements and the details of the card design. Trip levels must be set far enough from the nominal voltage to avoid unwanted nuisance shutdown under normal worst-case conditions. As a starting point, consider setting the OV shutdown threshold at 110% of nominal and the UV shutdown threshold at 90% of nominal. In most applications, use approximately 1-2 ms time delay for OV detection, to avoid nuisance shutdown due to transient voltage spikes. The UV detection time can be much slower, typically about 10‑50 ms. For a separate OV and UV warning, the threshold can be about 105% for OV and 95% for UV.

The monitoring circuit can be based on multiple comparators with an external voltage reference, using resistor dividers to set OV and UV limits and capacitors to set fault detection time. However, this approach can become quite complex for cards with a large number of voltage rails, particularly if separate warning and shutdown thresholds are required. Also, any changes to the voltage thresholds or time delays require component value changes and may even result in a PCB respin.

When a dedicated power management IC is used to control sequencing, the same IC can also provide monitoring. This avoids the need for separate monitoring components, and allows the voltage thresholds and time delays to be optimized without any change to component values. Separate warning and shutdown thresholds can be easily implemented within the device. Furthermore, the digital logic that detects OV or UV can provide much better discrimination against false tripping than is possible using a simple RC time delay, and can attempt a controlled restart after a shutdown.

Similarly, if a microcontroller is used for sequencing it can also provide monitoring, although the software development task becomes more challenging.

Output voltage adjustment

In many applications, output voltage adjustment is required for at least some of the rails. Most POLs offer the possibility to adjust the voltage using a fixed resistor between the adjust pin and the output. In most cases a resistor to ground raises the output voltage and a resistor to the positive output lowers the output voltage, although for some POLs the voltage changes in the opposite way. The POL datasheet gives an equation to calculate the resistor value for any required output voltage. The voltage adjustment capability of some POLs is quite large – these are often referred to as wide range POLs – and the fixed resistor is always necessary to set the output voltage. In other cases, only a small adjustment (typically about +/-10%) is possible, and the fixed resistor is only needed to offset the output voltage from nominal.

In some applications it is also a requirement to be able to alter the output voltage rails during system testing, referred to as margin testing. By raising or lowering each voltage rail while monitoring a key performance indicator (such as bit error rate), marginalities in system performance can be detected. For convenience, voltage changes for margin testing should be under software control rather than requiring changes to resistor values.

When a dedicated power management IC is used to control sequencing, the same IC can provide margin control. One or more DACs in the IC can be used to drive the adjust pin of each POL, either together or individually in turn. To achieve good stability and resolution, a fixed resistor is used between the DAC output and the adjust input, selected to suit the POL characteristics. It is also essential that the control IC uses a stable, precise voltage reference.

Similarly, if a microcontroller is used for sequencing it may also be possible to provide margin control through a GPIO pin. Software can drive the GPIO pin with a varying duty-cycle, and the voltage at the pin can be integrated (using an external op-amp) to simulate a DAC output. This output then drives the adjust pin of the POL through a resistor, as before.

Software-controlled voltage adjustment can also be used to implement closed loop trimming. The software reads each output voltage and compares it to the expected value. If it is too high, the trim setting is reduced slightly, and vice versa. This cycle is repeated continuously, keeping the repetition rate relatively slow (about 10ms) and the trim adjustment relatively small (a fraction of 1%), to avoid any possibility of instability. Closed loop trimming can improve the long term stability of the DC‑DC converters, but cannot compensate for short term effects due to load transients or input voltage transients.

Voltage readout and communication interface

When a dedicated power management IC or a microcontroller is used, it is a simple matter to provide remote read-out of the output voltages. This type of IC includes a communication interface such as I2C or SMbus that gives read/write access to the internal registers of the device, used for programming the initial configuration data. The same interface can be used while the card is in normal operation, allowing system software to read the rail voltages in real time, and to control voltage margining if required.

Design example

This section gives a design example, showing how dedicated power management ICs can be used to manage both primary and secondary side of a ‑48V card power system.

Primary side management

Figure 4 shows an example of a primary side power management IC (the PS‑1006 from Potentia Semiconductor) providing input voltage monitoring, low input shutdown and input fuse monitoring. The resistor network R4, R10 is used to reduce the input voltage to a low level where it can be measured by the ADC in the PS‑1006. Two more resistors (R3 and R9) are used to precisely sense UV, for low input shutdown.

A resistor network R1, R2, R6, R7 and R8 is used to monitor the low side (‑48V) fuses, with R25, R26 and R27 to monitor the high-side (return) fuses. Both high-side and low-side ORing diodes and fuses are required for applications such as ATCA, although in many other applications the high side returns are combined, with diodes and fuses only used in the low side.

Figure 5 shows how the same IC can provide inrush limiting, input current monitoring and control of the intermediate bus brick, as well as a communication link to the secondary side controller. When the card is plugged in, the inrush limiting MOSFET Q1 is slowly turned on via the transistor Q2. As soon as the input current rises to the current limit point, the drive to Q2 is reduced to prevent the input current exceeding the limit value. An internal time-out and retry capability in the PS‑1006 limits power dissipation in the MOSFET under overload conditions.

Primary current is measured by current sense resistor R18, using a current sense amplifier in the PS‑1006 with R12 and R15 to set the gain of the amplifier. This current sense signal is compared to an internal reference to provide inrush current limiting. The same current sense signal is used to measure input current through the internal ADC, and the current limit threshold is used as the trip point for the electronic circuit breaker function.

The communication link uses a small, inexpensive pulse transformer for isolation. The information transmitted over the link includes the following:

ADC voltage measurements (real-time):

· Input voltage (10-bit value)

· Input current (8-bit value)

Status information bits:

· Fuse fault

· Input overvoltage

· Input brownout

· Input overcurrent

All this information is available through the I2C interface on the secondary side controller (refer to Figure 7.)

Secondary side management

Figure 6 shows an example of secondary side power system control using a dedicated power management IC. In this example, four POLs are used to give output voltages of 1.5, 1.8, 2.0 and 2.5V. The Potentia PS‑2406 provides startup and shutdown sequencing, OV and UV monitoring with separate OV and UV alarms, and output voltage trimming for all the POLs.

All operating parameters including sequence, voltage thresholds, time delays, and GPIO pin functionality are fully configurable. The PS‑2406 also receives data from the primary side device through the transformer‑isolated link, shown in Figure 5. An I2C interface is used for communication, and a JTAG port is available for configuration. Four GPIO pins can be configured as power good outputs, external enable inputs, or to give primary side fault indication. If required, of the GPIO pins can be configured to send a signal to shut down the primary brick under un-recoverable fault conditions, as discussed earlier.

Figure 7 shows how the primary and secondary side power controllers come together to provide complete control of the entire power system, including the primary brick shutdown function.

Summary

Card power system design can be dramatically simplified by using dedicated power management ICs to replace traditional control circuits implemented using discrete components, or using general purpose microcontrollers. This approach also allows significant enhancement of power system performance and features, while improving overall reliability. Dedicated power management devices are now available with features to suit a wide range of applications.

Figure captions

Figure 1 – Card power system block diagram

Figure 2 – Interconnection of tracking POLs

Figure 3 – Output voltage tracking between two POLs

Figure 4 – Primary side voltage and fuse monitor

Figure 5 – Inrush limiter, brick control and isolated communication link

Figure 6 – Secondary side control using a dedicated power management IC

Figure 7 – Complete card power system showing primary and secondary control