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Cirrus CS4353立体声D/A系统方案

作者:  时间:2009-10-14 11:10  来源:
Cirrus Logic公司的CS4353是完整的立体声数模转换系统,包括有数字插入,5阶多比特delta-sigma数模转换,数字去加重,模拟滤波和从3.3V电源的片内2VRMS电平驱动器. CS4353具有理想的差分线性度,不会由于电阻匹配误差所造成的失真,也没有时间和温度上的线性漂移,对时钟抖动有高容差,以及外接元件数最少,可用在视频游戏控制台,DVD播放器和刻录机,A/V接收机,机顶盒和数字电视等.本文介绍了CS4353的主要特性,方框图,应用连接图和评估板CDB4353的主要特性, 方框图,电路图和元件分布图.

The CS4353 is a complete stereo digital-to-analog system including digital interpolation, fifth-order multi-bit delta-sigma digital-to-analog conversion, digital de-emphasis, analog filtering, and on-chip 2 VRMS line-level driver from a 3.3 V supply.

The advantages of this architecture include ideal differential linearity, no distortion mechanisms due to resistor matching errors, no linearity drift over time and temperature,
high tolerance to clock jitter, and a minimal set of external components.

The CS4353 is available in a 24-pin QFN package in both Automotive (-40°C to +105°C) and Commercial (-40°C to +85°C) grades. The CDB4353 Customer Demonstration Board is also available for device evaluation and implementation suggestions.

These features are ideal for cost-sensitive, 2-channel audio systems including video game consoles, DVD players and recorders, A/V receivers, set-top boxes, digital TVs, mini-component systems, and mixing consoles.

CS4353主要特性:
Multi-bit Delta-Sigma Modulator
106 dB A-wt Dynamic Range
-93 dB THD+N
Single-ended Ground Centered Analog Architecture
–No DC-blocking Capacitors Required
–Integrated Step-up/Inverting Charge Pump
–Filtered Line-level Outputs
–Selectable 1 or 2 VRMS Full-scale Output
Low Clock-jitter Sensitivity
Low-latency Digital Filtering
Supports Sample Rates up to 192 kHz
24-bit Resolution
+3.3 V Charge Pump and Core Logic, +3.3 V Analog, and +0.9 to 3.3 V Interface Power
Supplies
Low Power Consumption
24-pin QFN, Lead-free Assembly



图1. CS4353方框图



图2.CS4353典型连接图

CS4353评估板CDB4353
The CDB4353 evaluation board is an excellent means for quickly evaluating the CS4353 24-bit, high-performance stereo D/A converter. Evaluation requires an analog signal analyzer, a digital signal source, and a +3.3 V power supply. Analog line-level outputs are provided via RCA phono jacks.

The CS8416 digital audio receiver IC provides the system timing necessary to operate the Digital-to-Analog converter and will accept S/PDIF and EIAJ-340-compatible audio data. The evaluation board may also be configured to accept external timing and data signals for operation in a user application during system development.
The CDB4353 is controlled by switches to select the digital signal source and configuration options for the CS4353. Current sense resistors allow for easy power
calculations during system development.

评估板CDB4353主要特性:
Demonstrates Recommended Layout and Grounding Arrangements
CS8416 Receives S/PDIF, & EIAJ-340-Compatible Digital Audio
Headers for External PCM Audio
Single-ended Stereo Analog Outputs
Requires Only a Digital Signal Source and a +3.3 V Power Supply for a Complete Digital-to-Analog Converter System
Configured by On-board Hardware Controls
Power, Digital Source Select, and S/PDIF Error Indicator LEDs
Current Sense Resistors for CS4353 Supplies (VA, VL, and VCP)



图3.评估板CDB4353方框图





图4.评估板CDB4353电路图(1)



图5.评估板CDB4353电路图(2)



图6.评估板CDB4353元件分布图

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