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  您的位置: 首页 > 颠峰对决——2008热点技术大看台

 
型号:
LatticeXP2    厂商:莱迪斯半导体 (Lattice Semiconductor)
技术参数

flexiFLASHTM Architecture

· Instant-on

· Infinitely reconfigurable

· Single chip

· FlashBAKTM technology

· Serial TAG memory

· Design security

Live Update Technology

· TransFRTMtechnology

· Secure updates with 128 bit AES encryption

· Dual-boot with external SPI

sysDSPTMBlock

· Three to eight blocks for high performance Multiply

and Accumulate

· 12 to 32 18x18 multipliers

· Each block supports one 36x36 multiplier or four

18x18 or eight 9x9 multipliers

Embedded and Distributed Memory

· Up to 885 Kbits sysMEMTMEBR

· Up to 83 Kbits Distributed RAM

sysCLOCKTM PLLs

· Up to four analog PLLs per device

· Clock multiply, divide and phase shifting

Flexible I/O Buffer

· sysIOTM buffer supports:

– LVCMOS 33/25/18/15/12; LVTTL

– SSTL 33/25/18 class I, II

– HSTL15 class I; HSTL18 class I, II

– PCI

– LVDS, Bus-LVDS, MLVDS, LVPECL, RSDS

Pre-engineered Source Synchronous

Interfaces

· DDR / DDR2 interfaces up to 200 MHz

· 7:1 LVDS interfaces support display applications

· XGMII

Density And Package Options

· 5k to 40k LUT4s, 86 to 540 I/Os

· csBGA, TQFP, PQFP, ftBGA and fpBGA packages

· Density migration supported

Flexible Device Configuration

· SPI (master and slave) Boot Flash Interface

· Dual Boot Image supported

· Soft Error Detect (SED) macro embedded

System Level Support

· IEEE 1149.1 and IEEE 1532 Compliant

· On-chip oscillator for initialization & general use

· Devices operate with 1.2V power supply

性能特点

      LatticeXP2 系列可提供 5K 至 40K 个查找表 (LUT) 的容量,相比于前一代的 XP 系列, XP2 的最大逻辑密度倍增,效能也提高了 25% 。此外, XP2 并提供高达 12 个 sysDSP 区块,每一区块可执行于 325MHz ,以支持高效能信道乖法与累加功能,并可广泛地应用于无线基地台与医疗应用中。

结构框图

应用领域

      无线基地台与医疗应用等。

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