Altera, InterNiche and MorethanIP Announce Networking Reference Design for Nios II Processor

Altera Corporation (NASDAQ:ALTR), InterNiche and MorethanIP today announced the availability of a networking reference design for Altera’s Nios® II embedded processor. Delivering over 60 Mbits of throughput via TCP/IP over a 100-Mbit link, embedded designers can leverage the flexibility, performance and ease-of-use of the reference design for embedded applications requiring high-throughput network connectivity.
“The versatility and performance of our NicheStack IPv4 protocol suite addresses the challenges faced by embedded systems development teams,” said Larry Larder, president of InterNiche. “By enabling low-cost TCP/IP connectivity on FPGA designs with exceptional performance, we help to open up a new world of flexibility for the system designer.”
“Embedded designers can use our Ethernet MAC with integrated hardware network protocol acceleration (MAC-NET core) to increase the networking performance for their embedded systems that require high throughput,” said Daniel Koehler, CTO at MorethanIP. “The InterNiche embedded TCP/IP is a perfect complement to the
MAC-NET core, providing Nios II designers with a highly optimized, scalable and full-featured solution.”
Enabling Flexible, High-Performance Designs
Embedded designers can use Altera’s SOPC Builder tool and Nios II integrated development environment (IDE) to customize their reference design using MorethanIP’s MAC-NET core and InterNiche’s NicheStack IPv4 software stack. SOPC Builder enables the system engineer to quickly add, edit and specify the connections between the Nios II processor, MAC-NET core and other peripherals in the system. It then connects all of the peripherals together using the high-performance Avalon™ switch fabric, enabling the MAC-NET core to efficiently move data through local memory resources. The Nios II IDE, available for free from www.altera.com, provides a robust software development environment to build, debug and deploy their software applications using the InterNiche software stack.
The reference design uses the low-cost Nios II evaluation board, featuring a Cyclone™ EP1C12 FPGA. The reference design features:
•A white paper
•Documentation
•Design files
•A ready-to-use demo
•MAC-NET, a high-performance Ethernet media access controller (MAC) with integrated network protocol acceleration functions from MorethanIP
•NicheStack IPv4, InterNiche’s flexible and optimized networking stack
The MAC-NET core supports 10/100/1000 Mbit Ethernet connections and incorporates a layer 3/4 high-performance checksum block to accelerate network operations supporting InterNiche’s NicheStack IPv4 and IPv6 with TCP and user datagram protocol (UDP) protocols. InterNiche’s NicheStack IPv4 provides developers with a configurable TCP/IP protocol suite equipped with a complete range of management and security protocols including simple network management protocol (SNMP), secure sockets layer (SSL), IP security (IPsec) and embedded HTTP server, as well as a seamless roadmap to IPv6 support.
“The introduction of this reference design from InterNiche and MorethanIP is another example of the momentum behind the Nios II embedded processor,” said Louie Leung, Altera Asia Pacific Marketing Director. “Embedded designers will be able to leverage the flexibility and performance of the MAC-NET core and NicheStack IPv4 protocol suite for their FPGA-driven network connected products.”
Availability
The reference design, the Nios II embedded processor and the complete evaluation toolset can be downloaded from www.altera.com. The MorethanIP MAC-NET is available for purchase from www.morethanip.com. To purchase InterNiche NicheStack products, please visit www.iniche.com.