Vice President, Strategic Marketing

To meet the growing demand for more highly integrated wireless semiconductor solutions, innovation is accelerating along two fronts - functional integration at both the die and package level, and complete semiconductor system solutions for cellular handset applications. The latter combines all the necessary highly integrated silicon, modules and software into a single comprehensive solution, simplifying the design process while speeding up the time to market.

Each design strategy offers its own benefits, and the “right” approach will depend on numerous factors, including the nature of the different market segments in terms of levels of functionality, the need for customization, requirements to commoditize the electronic backbone of a handset, availability of broadly capable technologies and, most critically, cost implications.

Integration Techniques

On the functional integration front, designers are can employ either system-on-a-chip (SoC) integration or system-in-package (SiP) techniques.

Historically, silicon integration meant the consolidation of all functionality on a single die, but in wireless products, the definition is not so clear-cut since equal parts analog/RF, digital and mixed-signal blocks must all work together to achieve a system solution. In this market segment, SoC, or specifically the definition of ‘system,’ has broad interpretation. This might include a high level of SoC integration within the digital/baseband domain or within the RF space, greatly simplifying product design. Or, it might mean a broader approach, encompassing the combination of RF, analog and baseband (and potentially the RF power and switching) on a single device.

Similarly, integration at the package level can be achieved in various ways using SiP. Devices are produced with different process technologies and then integrated in a high-density solution at the package level, resulting in products such as matched power amplifiers, the transmit chain of the RF front-end, or even a single package radio (SPR™), all which exist today. Or, SiP solutions can be extended to include all mixed signal and digital functions in the future. Thus, SoC and SiP should be viewed more as a process or a trend rather than as an end state. The reality is that cost pressures and technology advances are significant drivers and integration will continue to occur, simplifying the bill of material at the handset level for a given function, regardless of the approach. At some point in the future, integration at the die level will significantly reduce input/output count and deliver all the other traditional benefits of smaller process geometries.

SiPs are becoming increasingly popular for designing the mid- to high-end tiers of today’s handset product spectrum. Because of the growing demand for richer handset feature sets, the design and marketing of mobile phones has changed, resulting in a dramatic expansion of design content supporting digital cameras, multimedia and enhanced user interfaces. This trend, coupled with the move to advanced communication standards, such as 3G, is driving a product-tiering approach across a spectrum of low- to high-end handset designs. At the mid- to high-end, feature-rich products include a multitude of technical capabilities, but also require a quicker time-to-market, unsurpassed performance, richer customization and lower cost than competitive models. These demands will accelerate the need for design flexibility and the ability to match subsystem components and devices for optimum cost vs. performance. This scenario is ideal for the SiP approach across the system partitioning, acknowledging that integration will continue to evolve in the core devices.

Within the lower-tier market segment, designers must focus on the core mobile phone functionality plus advanced features that are becoming highly standardized and commoditized. Because of their common feature set, these designs would require little or no hardware customization at the system level across handset platforms. The lower-tier market is ideal for more all-encompassing SoC devices. The availability of high-volume, standardized, highly integrated SoC solutions can offset the higher development costs and longer lead times at the device level, and offer a more rapid design cycle at the system level while providing adequate performance at lower cost as compared to discrete solutions.

The ability to integrate many functions into a SoC device has been proven in both the digital and RF handset realms. One example is a transceiver device that integrates previously discrete devices such as a receiver, transmitter, voltage control oscillators (VCOs), low noise amplifiers (LNAs) and other circuits into a very small, cost-effective device. Similar achievements have been prominent in the baseband. Eventually, a highly aggressive approach toward integrating radio and baseband elements in an SoC device will be technically possible, although challenged by cost implications. Digital circuits manufactured with complementary metal oxide semiconductor (CMOS)-based processes can follow an aggressive cost-reduction path, but RF and analog circuits and passive components (which comprise a large percentage of the device area) will not scale linearly at the finer geometries, and their performance requirements may cause substantial customization of the silicon fabrication process. This can limit the actual cost benefits of CMOS integration and result in a higher cost than either discretes or SiPs due to higher wafer costs and larger, lower-yielding die.

SoCs face other challenges in the RF blocks and certainly in the RF front end. It is significantly more difficult for CMOS-based designs to match the power-consumption characteristics of RF-CMOS solutions and specialty process technologies like bipolar complementary metal oxide semiconductor (BiCMOS) or silicon germanium (SiGe). This is because of the challenges associated with achieving high gain and controlling close-in 1/f noise. This can lead to more design iterations, and may limit performance in 3G and other demanding radio applications. It will be difficult to solve these challenges.

Also, in the front end, many circuits, including power amplifiers, RF switches, large value passives, precision RF filters or other components do not leverage the size-reduction or high mask counts that are possible with high-volume silicon processes. In some instances, these circuits are simply not process-compatible. Plus, continued improvement in performance and cost in these discrete devices continue to tip the scales in their favor. With an SoC design, handset designers must address a variety of issues that require significant RF expertise, leading to as many as three to five turns, each consuming two- to three-months for a typical RF board.

As an alternative, then, many are finding that it is better to minimize the risks and challenges associated with SoC integration and instead use advanced packaging techniques, combined with selected silicon integration in specific functional blocks, to optimize flexibility so that designers can deal with architectural partitioning trends, evolving standards, rapidly changing feature requirements, and increased system complexity. (See Fig. 1).

Fig. 1

Caption: Multi-chip module (MCM) packaging can surpass the limitations of IC integration, alone, and deliver immediate cost, size and power benefits.

SiPs Becoming Industry Workhorses

SiP has become a workhorse approach in functional blocks that take advantage of a mix of various devices and components to maximize performance and cost – most clearly in the RF front end. It allows designers to develop products well ahead of the silicon integration curve.

SiPs also improve roadmap flexibility. SoC advocates have drawn a roadmap in which most of the functionality, including the RF and analog blocks, moves onto the baseband die. With the multi-chip module (MCM) packaging approach, the handset design is broken into digital and analog functions. Digital moves to the baseband die and analog to the transceiver die, and today’s mixed-signal device is eliminated (See Fig. 2).

Fig. 2

Caption: With an MCM packaging strategy, the digital baseband die remains digital and can continuously shrink along the known roadmap of smaller geometries. The SoC approach locks RF, analog and baseband on the same die, making it difficult to quickly modify a design or move to smaller geometries since the RF and analog blocks don’t automatically scale.

Clearly, SiPs make it much easier to quickly modify a design to support new capabilities and standards, or to move to smaller form factor. The digital baseband die remains digital and can continuously shrink along the known roadmap of smaller geometries, while incorporating new features such as integrated WLAN modem capabilities, multimedia, cameras, video, satellite receivers for audio and music, GPS, color displays, Bluetooth, and other emerging applications. Similarly, the RF portion of the design then remains analog, and designers can focus on transceiver integration, discrete component reduction in the radio module, and smaller module sizes.

There are two prime examples of SiP successes: Single Package Radios (SPRs™), and 802.11b/g WLAN front-end modules (FEMs).

The SPR™ solution combines all of the radio circuitry required for a dual- or tri-band GSM/GPRS handset in one-third the footprint of alternative solutions created from discrete components. It combines a transceiver, PA and associated controller, two surface acoustic wave (SAW) filters and a switchplexer module with switches and low-pass filters into a compact 40-pin 11x10 mm laminate MCM package. By combining this radio package with a companion baseband device, the designer has a two-package phone without the risks associated with a SoC solution that might drive unproven and potentially incorrect architectural partitioning decisions as standards, technologies and feature requirements continue to evolve.

The goal of the SPR™ solution is to improve the integration of two key handset components – the DCR™ and PA – in order to create a smaller and less costly MCM package. SPR™ modules will continue to incorporate an increasing number of previously discrete components to further reduce the overall costs. Before the advent of the SPR™, handset manufacturers had to combine discrete components in a much larger and complex area, while also resolving difficult board and circuit-level RF design issues and bearing the costs of shielding, insertion/assembly and other discrete-component integration tasks.

The MCM-based SPR™ solution incorporates functional blocks fabricated with proven high-performance process technologies to increase the performance and maintain power efficiency. The MCM approach is also less costly than discretes. It can cost up to $7, or more, for all of the GSM radio subsystem’s discrete components, not counting the cost of shielding, insertion/assembly and other expenses. The same functionality in a single-package module can be achieved at a comparable or only slightly higher price, while removing the individual purchasing, inventorying and packaging costs associated with each of the discrete components. The MCM consists of proven die for each component, and occupies a compact, 11x10-millimeter footprint. Wafer-level testing of today ensures at least 98 percent yield levels for each die in this MCM package, which has allowed manufacturers to routinely ship high-volume, high-yield solutions.

As mentioned earlier, silicon-level integration continues to evolve for an SiP’s core devices, and this is true of the SPR’s DCR and PA blocks. In 2004 Skyworks introduced a GSM/GPRS quad-band DCR™ in a 6mm x 6mm footprint, reducing external component requirements from approximately 50 to less than 25. DCR technology eliminates the intermediate-frequency conversion steps of earlier handset solutions, reducing bill of materials costs and the number of external components required to build a radio subsystem by more than one-half. When paired with a transmit FEM into an MCM, it created the world’s first sub-250 square millimeters quad-band RF subsystem, paving the way for more cost-efficient and reliable infrastructure equipment such as 3G and 4G base station transceivers.

Similar developments are underway for the DCR™’s companion PA within an SPR™ solution. Skyworks’ latest-generation PA Plus™ reduced the component count by 30 percent, cutting the size and cost of 802.11 b/g WLAN products while easing the board layout. The latest SPR advancements deliver dual, tri- and quad-band capabilities.

The second SiP example, 802.11b/g WLAN FEMs, solves the problem of discrete component integration. Designers previously had to use separate components for the PA, switches, filters, baluns, LNA and diplexer, in addition to all of the necessary passives. Each component had to be placed and soldered individually, increasing the total cost and risking damage for each and every placement. Further, designers needed to consider how to best layout these components and where to fit them on the PCB. In contrast, the FEM is a packaged module that integrates all of the front-end components into one. This packaging approach makes it possible to combine a fully integrated 802.11a/b dual-band WLAN FEM including power amplifier, switch and filter functions, with a complete SPR™ solution for 2.5 GSM/GPRS cellular handsets. This allows for a single convenient module that reduces system design time and cost. Customers can then develop complete architectures with fewer components when compared to alternative solutions, saving valuable board space.

Advances like the SPR and WLAN FEM have enabled the industry to leapfrog historical milestones by emulating functional integration through advanced packaging techniques that combine capabilities of multiple proven die into a single, easy-to-test/assemble module. This has enabled many critical steppingstones to quad-band and 3G handsets, while opening up both space (cutting the number of external components nearly in half) and processing horsepower on the handset platform for such capabilities as built-in cameras, color screens, MP3 support and GPS. Advanced packaging strategies continue to reach important integration milestones. Sales of these more highly integrated RF and system-level products outpace the overall growth of the wireless semiconductor market. Meanwhile, shorter product life cycles and new feature-sets are driving the need for simplified cellular handset architectures and better system efficiency which is leading many designers to choose complete system solutions.

Complete System Solutions

On the system integration front, the last several years have seen a variety of new consumer-electronics market entrants, thanks to comprehensive cellular system solutions that provide all major integrated circuits, a full operator-qualified, network-approved protocol stack, all necessary development tools, and customer support for building a complete platform. This approach allows vendors to quickly enter into emerging markets with feature-rich phones that include features such as LCD color displays, ringtone melodies and multimedia features. Cellular systems solutions will continue to grow in features and performance, while at the same time take advantage of integration advances at the die and package level.

Additionally, with complete cellular systems solutions, manufacturers are able to focus on product differentiation and new applications. System solution vendors supply the manufacturers with all of the devices from the baseband through the PA, as well as all of the software. The system solution vendor and handset manufacturer then work together on board layouts, and the handset manufacturer has more available resources with which to focus on the form factor, MMI, plastics and feature/performance definition. Time-to-market is greatly reduced as compared to the traditional model and in many cases, the typical two-year design cycle can be cut to as little as 12 or 18 months, while delivering an aggressive form factor and extremely rich feature set.

One example of this approach is Skyworks’ Pegasus system solution. The hardware portion of Skyworks' complete cellular system solution includes all digital and analog baseband processing, multi-band/multi-slot power amplification, power management, battery charging and transceiver functions. Skyworks' protocol stack has been field tested, qualified and approved in more than 50 countries, and by more than 70 GSM network providers worldwide. (See Figure 3)

Fig. 3

Caption: Skyworks Pegasus platform – a complete system solution.

With these comprehensive solutions, many new handset manufacturers have entered the marketplace over the past two years. Increased competition and greater consumer choice has led to cellular handsets with significantly more features and capabilities at lower price points.

Multiple Integration Paths

Designers have more options than ever for designing next-generation wireless handsets. Today’s various integration options are fueling innovation at a rapid pace, and enabling handsets that drive average revenue per user (ARPU) by continuously adding new features and functions while reducing handset size and overall cost. Integration previously meant increasing the functional density of individual chips, but the industry is accelerating this movement by emulating functional integration through advanced packaging techniques that combine capabilities of multiple proven die into a single, easy-to-test/assemble module. Each module follows its own integration path, using the best mix of available product and process technologies. The end goal is the fully integrated single-chip phone, but by combining silicon integration with advanced packaging strategies, handset designers are able to get the most flexible and risk-free development roadmap possible, while still realizing a good portion of tomorrow’s cost, power and space savings by integrating at the package level.

Additionally, the advent of full system solutions is making it easier than ever for consumer electronics manufacturers to enter the market and provide consumers with a flood of new product options. Designers who remain unbiased about the best integration path – whether SoC or SiP, or a full system solution -- and who are well-versed in the appropriate use of each available approaches in its appropriate context, will be best positioned to make the most effective choices on their product roadmaps.

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Joe Adam is vice president, Strategic Marketing for Skyworks Solutions, Inc. where he is responsible for RF product strategy and new business development. His primary tasks involve the evaluation, selection and implementation of new technologies in order to maximize product revenue and reduce costs. When Skyworks was a part of Contexant, he was vice president, Packaging and Test, where he was responsible for the development of leading-edge manufacturing technologies for telecommunications products.