Freescale无线基站收发器解决方案

Today’s networking infrastructure systems are characterized by separate voice, fax, and data subsystems over independent real-time voice (circuit switched) and data (packet) networks. The industry is moving to next generation systems that are based on a configurable open architecture platform supporting a universal port combination of real-time voice, fax, and data on a packet-switched network.

The baseband functionality of a Wireless Base Station Transceiver includes:

Separating received signals into channels by combining correct time slots or coded messages

Sending these signals to the Base Station Controller for compression

Changing to another channel when directed by the BSC

Converting channels back into analog, combining multiple voice channels, up-converting to IF,

filtering, and amplifying signals for transmission to mobile subscribers

As demand for mobile services beyond voice drives next-generation data-primary systems, the base station must handle the more complex processing, modulation, and coding requirements of significantly-higher data rates and the new air interface schemes which support them.

2G/3G Wireless Network Diagram

Solution:

To meet the needs of the wireless market, Freescale Semiconductor believes it is vital to provide more than silicon to our customers. The building blocks for tomorrows solutions include silicon, software, and design tools.

Signal Processing

Freescale offers two DSP architectures to meet baseband processing requirements for the base station transceiver:

The SC140 core features 1200 MMACS of performance. It is high-level-language friendly and features a comprehensive set of software tools. Application software modules for GSM, CDMA, and TDMA vocoders, and 3G cellular infrastructure are available from Freescale and third-party vendors. The SC140 is the quad arithmetic logic unit (ALU) StarCore architecture that is used in Freescale’s MSC810x DSP family:

MSC8101, with up to 1500 MMACS of performance, integrates an on-chip 32-bit RISC protocol machine, allowing connectivity to standard network backbones such as ATM, fast Ethernet, and fast TDM highways.

MSC8102 consists of four SC140 cores featuring up to 6000 MMACS of performance and 1436KB of on-chip static RAM (SRAM) memory.

24-bit DSP56300 DSP family devices are widely used today in multi-channel voice and data products (up through 2.5G). These pin-compatible DSPs enable customers to rapidly implement new telecommunications standards and bring new products to market.ndards, including Media Gateway Control protocols such as MGCP and MEGACO.

Network Interface

Network interface and station control requirements may also be served by the PowerQUICC™ family of integrated communications processors, which pioneered the dual-processor architecture:

A core ISA CPU handles system tasks with a variety of onboard peripherals and a standard bus interface.

A specially designed RISC communication processor, with integrated support for multiple protocols, manages serial communication channels.

This architecture significantly enhances system performance and efficiency and saves on power consumption. In addition, the established code base and broad third-party support from Freescales Smart Network Alliance Program members further enable cost-efficient solutions and accelerated time-to-market for base station equipment suppliers.

Block Diagram

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