SiliconBlue iCE65 uW FPGA方案

SiliconBlue 公司的iCE65是超低功耗的可逻辑器件,它的静态功耗为微瓦级.iCE™ FPGA系列采用65纳米低功耗标准CMOS工艺和NVCM(Non-Volatile Configuration Memory, 非易失性配置存储器)专利技术，能减少额外使用闪存PROM(可编程只读存储器)的成本，工作电流低至25微安, 逻辑容量从2k到16k逻辑单元，I/O数目从128到384个,提供与ASIC同样的逻辑能力，并有业界最低的逻辑芯片的成本，非常适合以电池为能源的手持设备。本文介绍了iCE65系列的主要性能, 内部架构特征, 可编程的逻辑区块和逻辑单元,以及可编程的输入/输出(I/O)引脚和iCEman65评估板方框图和主要特性.

iCE65 Ultra Low-Power Programmable Logic Family
主要特性:
First high-density, ultra low-power programmable logic family specifically designed for hand-held applications and long battery life
As low as 25 μA at 32.768 kHz or less; no special power modes required
Lowest active power of any programmable logic family
Reprogrammable from a variety of sources and methods
Processor-like mode self-configures from external, commodity SPI serial Flash PROM
Downloaded by processor using SPIlike serial interface; like a processor peripheral
In-system programmable, ASIC-like mode loads from secure, internal Nonvolatile Configuration Memory (NVCM)
Ideal for volume production
Superior design and intellectual property protection; no exposed data
Proven, high-volume 65 nm, lowpower CMOS technology
Low leakage, μW static power
Lower core voltage, lowest dynamic power
Up to 200+ MHz internal performance
Flexible programmable logic and programmable interconnect fabric
Over 16K look-up tables (LUT4) and flip-flops
Low-power logic and interconnect
Flexible I/O blocks to simplify system interfaces
Up to 384 programmable I/O pins
Four independently-powered I/O banks; support for 3.3V, 2.5V, 1.8V, and 1.5V voltage standards
On-chip, 4Kbit RAM blocks; up to 96 per device
Low-cost, space-efficient packaging options
Complete development system support
VHDL and Verilog logic synthesis
Place and route software
Design and IP core libraries
Windows and Linux support
Evaluation kit platform



图1.iCE65系列的架构特征



图2.可编程的逻辑区块和逻辑单元



图3.可编程的输入/输出(I/O)引脚

iCE65评估板
The iCE65 evaluation board, pictured in Figure 4, is designed as an applications development and evaluation platform for the SiliconBlue Technologies ultra low-power iCE65 programmable logic family. The iCE65 evaluation board provides for extensive I/O expansion and voltage flexibility. Very few of the iCE65 programmable I/O pins are dedicated to specific functions.



图4.SiliconBlue iCEman65评估板外形图



图5.SiliconBlue iCEman65评估板方框图
Evaluation and development platform for SiliconBlue Technologies iCE65 ultra low-power programmable logic family.
iCEman65评估板主要特性:
iCE65L04V
3,520 logic cells
80Kbits of RAM
284-ball chip-scale BGA package
176 programmable I/O pins
Four I/O banks, each with a selectable I/O voltage
Extensive I/O expansion
Three 100-pin Hirose FX2 connectors
Three 40-pin ribbon cable connectors
Eight 6-pin Digilent PMOD connectors
An 80-pin high-speed Samtec connector
Flexible I/O bank voltages
Selectable I/O supply voltage
Isolation jumper for accurate power measurement
Multiple clock inputs
Socketed 32.0 MHz half-size oscillator
32.768 kHz oscillator
SMA-style clock input/output
Three additional unpopulated SMA clock inputs
SPI configuration interface
8Mbit SPI serial Flash PROM; store up to four independent configuration images
iCE65 slave SPI interface
USB 2.0 programming/debugging support
Power board from USB host
Program SPI serial Flash
Program iCE65 device as SPI slave
High-speed parallel application interface to iCE65 device