ADI ADF4350宽带时钟合成方案

ADI公司的ADF4350是集成了VCO的宽带时钟合成器,可以实现分数N 或整数N PLL频率合成,输出频率从2.16GHz到4.35GHz.片内的1/2/4/8或1/16分频电路可产生低到135MHz的RF.工作电压3.0 V到 3.6 V,1.8V逻辑兼容,广泛用在无线基础设备如WCDMA,TD-SCDMA, WiMAX, GSM以及测试设备,无线LAN,CATV和时钟发生器.本文介绍了ADF4350的主要特性,方框图和用作直接变换调制器的电路图以及和ADuC812, ADSP-21xx的接口连接.

ADF4350: Wideband Synthesizer With Integrated VCO
The ADF4350 allows implementation of fractional-N or integer-N phase-locked loop (PLL) frequency synthesizers if used with an external loop filter an external reference frequency.

The ADF4350 has an integrated voltage controlled oscillator (VCO) with an output frequency ranging from 2.16 GHz to 4.35 GHz. In addition, divide-by-1/2/4/8 or 16 circuits allow the user to generate RF output frequencies as low as 135 MHz. For applications that require isolation the RF output stage can be muted. The mute function is both pin and software controllable.

An auxiliary RF output is also available, which can be powered down if not in use. Control of all the on-chip registers is through a simple 3-wire interface. The device operates with a power supply ranging from 3.0 V to 3.6 V and can be powered down when not in use.

ADF4350主要特性:
Output frequency range: 135 MHz to 4.35 GHz
Fractional-N synthesizer and integer-N synthesizer
Low phase noise VCO
Programmable divide-by-1/2/4/8 or 16 output
Typical rms jitter 0.5 ps rms
3.0 V to 3.6 V power supply
1.8 V logic compatibility
Programmable dual-modulus prescaler of 4/5 or 8/9
Programmable output power level
RF output mute function
3-wire serial interface
Analog and digital lock detect
Switched bandwidth fast-lock mode
Cycle slip reduction

ADF4350应用:
Wireless infrastructure (WCDMA, TD-SCDMA, WiMax, GSM, PCS, DCS, DECT)
Test equipment
Wireless LANs, CATV equipment
Clock Generation



图1. ADF4350功能方框图



图2. ADF4350直接变换调制器电路图



图3. ADF4350和ADuC812接口连接



图4. ADF4350和ADSP-21xx接口连接