Freescale MPC8569E宽带接入MDS方案

Freescale公司的MPC8569E PowerQUICC® III处理器采用高性能的e500处理器核,基于Power Architecture®技术,可升级到1.33GHz,并具有灵活的通信引擎和高速系统接口,可实现IP和多协议解决方案,可用于包括3G/WiMAX/LTE基站,无线电网络控制器,网关和ATM/TDM/IP设备在内的宽带接入设备.本文介绍了MPC8569E的主要特性,方框图以及无线B节点的网络接口卡(NIC)方框图,MPC8569E PowerQUICC® III模块开发系统(MDS)的主要特性和指标,与MPC8569 MDS方框图.

MPC8569E PowerQUICC® III Processor
The MPC8569E PowerQUICC® III family is designed to address the increasing
performance requirements for broadband access equipment including 3G/WiMAX/LTE
base stations, radio network controllers, gateways and ATM/TDM/IP equipment.
The MPC8569E helps facilitate both IP and multi-protocol solutions by combining
a high-performance e500 processor core, built on Power Architecture® technology
and scaling up to 1.33 GHz, with a flexible communications engine and high-speed
system interfaces.
The MPC8569E is designed to enable customers to handle many functions in a
single chip solution that otherwise would require multiple devices. Ultimately, this high
level of integration provides savings in cost, power and board space. The MPC8569E
provides multi-protocol support for both protocol termination and interworking for
a wide range of communication protocols, including ATM, POS, Ethernet, PPP, HDLC
and TDM—allowing the flexibility necessary for broadband access devices. Four Gigabit
Ethernet ports, PCI Express® and Serial RapidIO® interconnect technology enables
high-speed links to industry-wide switches, field-programmable gate arrays (FPGAs),
application-specific integrated circuits (ASICs) and digital signal processors (DSPs).
An optional integrated security engine supports common encryption algorithms,
including the SNOW 3G algorithm needed for LTE wireless security.

MPC8569E 主要特性:
High level of integration and performance, simplifying board design
Consistent programming model across the PowerQUICC III family of processors
Flexible system-on-chip (SoC) platform helps improve time to market
45 nm silicon-on-insulator (SOI) technology
Enhanced high-performance e500 core with 32 KB D/I cache
512 KB L2 cache
High internal processing bandwidth
Integrated DDR2/DDR3 memory controllers
Four integrated Gigabit Ethernet controllers
Advanced QUICC Engine™ technology supports a wide range of protocols and
associated interworking
Flexible high-speed interconnect interfaces Serial RapidIO interconnect technology
PCI Express support
Enhanced local bus interface supporting NAND flash control machine
Optional integrated security engine (indicated by an E in the device number)
Technical Specifications
Embedded e500 core, scaling up to 1.33 GHz 2799 MIPS at 1.33 GHz (estimated
Dhrystone 2.1) 36-bit physical addressing Double-precision embedded floating point
Memory management unit (MMU)
Integrated L1/L2 cache L1 cache—32 KB data and 32 KB instruction L2 cache—512 KB (8-way set associative)
Integrated DDR memory controller with full ECC support
Optional integrated security engine supporting DES, 3DES, MD-5, SHA-1/2, AES, RSA, RNG, Kasumi F8/F9, SNOW and ARC-4 (indicated with an E in the device number)
QUICC Engine technology Protocol Support:
ATM SAR up to 622 Mbps (OC-12) full duplex
PPP, multi-link (ML-PPP), multi-class (MC-PPP) and PPPmux termination and interworking
IP termination support for IPv4
ATM (AAL2/AAL5) to Ethernet (IP), Ethernet to Ethernet (IP) interworking
Extensive support for Ethernet RMON/ MIB statistics
256 channels of HDLC/Transparent or 256 channels of SS7 Serial Interfaces:
One UL2/POS-PHY interfaces
Four 10/100/1000 Mbps Ethernet interfaces using GMII, RGMII or SGMII
Up to eight 10/100 Mbps Ethernet interfaces using MII, RMII or SMII
Up to sixteen T1/E1/J1 interfaces or eight T3/E3 interfaces
Dual SPI interfaces
Full/low speed USB
Serial RapidIO and PCI Express high-speed interconnect interfaces
On-chip network switch fabric
166 MHz, 32-bit, 3.3V I/O, enhanced local bus with memory controller
Enhanced Secured Digital Host Controller (eSDHC) used for SD/MMC card interface
Integrated four-channel DMA controller
Dual I2C and Dual Universal Asynchronous Receiver/Transmitter (DUART) support
Programmable interrupt controller (PIC)
General Purpose I/O (GPIO)
IEEE 1149.1 JTAG test access port
1.0V core voltage with 3.3V, 2.5V, 1.8V, 1.5V and 1.0V I/O
783-pin FC-PBGA package, 29 mm x 29 mm


Core e500, built on Power Architecture® technology CPU Speed 800 MHz, 1.0, 1.2, 1.33 GHz L1 I/D Cache 32 KB L2 Cache 512 KB Memory Controller 1 x 64-bit DDR2/DDR3 or 2 x 32-bit DDR2/DDR3 supporting data rates 533 Mbps–800 Mbps Local Bus 16-bit
System Interfaces Serial RapidIO®, PCI Express® (x4) QUICC Engine™
4 RISC Up to 667 MHz
Memory 256 KB Instruction RAM, 128 KB Multi-user RAM
Ethernet 4 x 10/100/1000, 8 x 10/100
ATM (AAL0,1,2,5) 1 x UTOPIA-L2, 124 M-PHY
Packet over SONET (POS) 1 x POSPHY-L2, 31 M-PHY
8 TDMs (256 channels of HDLC) 16 x T1/E1, 8 x T3/E3
Protocol Termination and Interworking Yes
USB Full/low speed
IEEE® 1588 v2
2 x SPI
Security Engine SEC 3.01
Additional Interfaces DUART, 2 x I2C, GPIO Interrupt Controller Yes
Package 783 FC-PBGA, 29 mm x 29 mm
Optional integrated security engine supporting DES, 3DES, MD-5, SHA-1/2, AES, RSA, RNG, Kasumi F8/F9, SNOW and ARC-4 (indicated with an E in the device number)
QUICC Engine technology Protocol Support:
ATM SAR up to 622 Mbps (OC-12) full duplex
PPP, multi-link (ML-PPP), multi-class (MC-PPP) and PPPmux termination and interworking
IP termination support for IPv4
ATM (AAL2/AAL5) to Ethernet (IP),Ethernet to Ethernet (IP) interworking
Extensive support for Ethernet RMON/ MIB statistics
256 channels of HDLC/Transparent or 256 channels of SS7 Serial Interfaces:
One UL2/POS-PHY interfaces
Four 10/100/1000 Mbps Ethernet interfaces using GMII, RGMII or SGMII
Up to eight 10/100 Mbps Ethernet interfaces using MII, RMII or SMII
Up to sixteen T1/E1/J1 interfaces or eight T3/E3 interfaces
Dual SPI interfaces
Full/low speed USB
Serial RapidIO and PCI Express high-speed interconnect interfaces
On-chip network switch fabric
166 MHz, 32-bit, 3.3V I/O, enhanced local bus with memory controller
Enhanced Secured Digital Host Controller (eSDHC) used for SD/MMC card interface
Integrated four-channel DMA controller
Dual I2C and Dual Universal Asynchronous Receiver/Transmitter (DUART) support
Programmable interrupt controller (PIC)
General Purpose I/O (GPIO)
IEEE 1149.1 JTAG test access port
1.0V core voltage with 3.3V, 2.5V, 1.8V, 1.5V and 1.0V I/O
783-pin FC-PBGA package, 29 mm x 29



图1.MPC8569E方框图



图2.采用MPC8569E的无线B节点的网络接口卡(NIC)方框图
MPC8569E PowerQUICC® III模块开发系统(MDS)
MPC8569E PowerQUICC® III Modular Development System (MDS)
MPC8569E Processor Board
The MPC8569E processor board includes a MPC8569E processor running up to 1.33 GHz, along with circuitry to utilize the following:
4x Gigabit Ethernet (GbE) and dual asynchronous receiver/transmitter (DUART)
PCI Express
Serial RapidIO® technology
USB 2.0
Double data rate (DDR3 or optional DDR2) memory
NOR and NAND flash memory
SD/MMC card interface
Real Time Clock (RTC)
Dual I2C interface
Serial electrically erasable programmable read-only memory (EEPROM)
Control switches and light emitting diode (LED) indicators
Digital/analog regulated core voltage power supply (PS)
Fully controlled onboard PS subsystem
Ability to remote Power On/Off function through external “dry contact” or
NPN/n-FET transistor
Programmable reconfiguration through on-board CPLD mapped Board
Configuration Registers Set (BCSR)
JTAG interface to host PC
The MPC8569E MDS processor board’s onboard resources and debugging devices
allow developers to upload and run code, set breakpoints, display memory and register
and connect proprietary hardware. It can also be used as a demonstration tool for the
developer since the developer’s application software may be programmed into the
flash memory.
The MPC8569E processor board can be inserted into a PC as a PCI Express end point device, using the optional PCI_PCI Express adapter. The PC power supply is not necessary. Other external connections are the same as in the stand-alone configuration.
PQ-MDS-PCI Express—Expansion module supporting multiple PCI agents (actual for
MDSs with legacy PCI I/F functionality) MPC8569E MDS Processor Board
MPC8569E 处理器板主要特性:
Supports the MPC8569E, running up to 1.33 GHz at 1.1V core voltage in a 783-pin FBGA 1 mm pitch package
DDR3 SODIMM @ 800 MHz, 1 GB without ECC support
PCI Express adapter to provide Root Complex mode
Dual 10/100/1000 Mbps Ethernet ports for QUICC Engine™ (UCC1 and UCC2)
Additional dual 10/100/1000 Mbps Ethernet ports for QUICC Engine (UCC3 and UCC4)
provided by a pair of Universal Ethernet Modules (UEM)
Dual RS232 transceiver connected to DUART
2x LYNXx1 modules provide dual Serial RapidIO interface
4x LYNX connected to PCI Express adapter through PCI Express mux to support host or agent modes:
4x PCI Express edge connector of optional PCI_PCI Express adapter can be plugged in a PC
PCI Express adapter slot connector for Root Complex mode accepts standard (off-the-shelf) PCI Express, up to x4 cards
Local bus I/F:
8-bit 32 MB NOR flash in a socket, address latch, data and control buffers to support slow devices on the PIB and PMC boards
8-bit 32 MB NAND flash in a socket CPLD BCSR
Debug port access via JTAG/COP connector
Two I2C buses
Bus for 256 KB boot EEPROM, 256 KB board related info EEPROM, real-time clock (RTC), SODIMM SPD EEPROM, core voltage POT, UEM configuration and PIB
Three operation modes Stand-alone mode PIB combined mode—plugged on the PIB
PCI Express end point mode—plugged into a PC as standard PC card (cost effective) through PCI or PCI Express adapter
QUICC Engine functions supported All QUICC Engine signals are available on PMC0 and PMC1 on the PIB 16x TDM port with the PQ-MDS-T1 card on the PIB (on PMC0)
2x DS3 port with the PQ-MDS-T1 card on the PIB (on PMC0)
1x UTOPIA/POS Level 2, 8-/16-bit, multi-PHY multi device with PQ-MDS-QOC3 cards on the PIB (on PMC0 and PMC1)
8x 10/100 Mbps RMII Ethernet ports on the PIB
4x 1000 Mbps RGMII/RTBI (2x SGMII) Ethernet ports on the PB
RoHS compliant
FCC compliant
CE compliant



主要应用:
Typical Applications for the MPC8569E PowerQUICC III Processor
IP and multi-protocol base station backhaul (2G/3G/LTE/WiMAX)
Access Gateway (IPv4 forwarding/security)
Legacy 2G/3G control
Microwave backhaul
Gigabit SME applications
Multi-service routers
Industrial networking



图3. MPC8569 MDS外形图




图4. MPC8569 MDS方框图