Cypress CY4602 Tetrahub USB 2.0 4端口Hub参考设计
作者: 时间:2009-09-18 10:58 来源:
Cypress公司的CY7C65640A是TetraHub高速USB Hub控制器, Tetra架构提供四个下行的USB端口,每个端口都有处理翻译器(TT). CY7C65640A集成了一个上行和四个下行USB收发器,串行接口引擎(SIE),USB 集线器(Hub)控制器和转发器以及四个TT,非常适合用在标准集线器,主板集线器和监视器集线器,外接个人存储器驱动,端口复制,手提设备和坞站.本文介绍了CY7C65640A主要特性, TetraHub架构图, CY4602 Tetrahub USB 2.0 4端口Hub参考设计方框图,电路图以及所用材料清单(BOM).
CY7C65640A: TetraHub™ High Speed USB Hub Controller
Cypress’s TetraHub™ is a high performance self powered Universal Serial Bus (USB) 2.0 hub. The Tetra architecture provides four downstream USB ports, with a Transaction Translator (TT) for each port, making it the highest performing hub possible. This single-chip device incorporates one upstream and four downstream USB transceivers, a serial Interface Engine (SIE), USB hub controller and repeater, and four TTs. It is suitable for standalone hubs, motherboard hubs, and monitor hub applications.
Being a fixed-function USB device, there is no risk or added engineering effort required for firmware development. The developer does not need to write any firmware for their design.
The CY4602 Tetrahub USB 2.0 4-port Hub Reference Design Kit provides all materials and documents needed to move rapidly into production. The reference design kit includes board schematics, bill of materials, Gerber files, Orcad files, key application notes, and product description.
CY7C65640A-LFXC is a functional and pin equivalent die revision of Cypresss CY7C65640-LFXC. Changes were made to improve device performance.
CY7C65640A主要特性:
■ USB 2.0 Hub
■ Four Downstream Ports
■ Multiple Transaction Translators - One per Downstream Port for Maximum Performance
■ VID, PID, and DID configured from External SPI EEPROM
■ 24 MHz External Crystal
■ Small Package - Quad Flat Pack, No Leads (QFN)
■ Integrated Upstream Pull Up Resistor
■ Integrated Downstream Pull Down Resistors for all Downstream Ports
■ Integrated Upstream and Downstream Series Termination Resistors
■ Configurable with External SPI EEPROM
❐ Number of Active Ports
❐ Number of Removable Ports
❐ Maximum Power
❐ Hub Controller Power
❐ Power On Timer
❐ Overcurrent Timer
❐ Disable Overcurrent Timer
❐ Enable Full Speed Only
❐ Disable Port Indicators
❐ Gang Power Switching
❐ Enable Single TT Mode Only
❐ Enable NoEOP at EOF1
图1.CY7C65640A TetraHub架构图
CY7C65640A主要特性:
USB Serial Interface Engine (SIE)
The SIE enables the CY7C65640A to communicate with the USB host through the USB repeater component of the hub. The SIE handles the following USB bus activity independently of the Hub Control Block:
■ Bit stuffing/unstuffing
■ Checksum generation/checking
■ ACK/NAK/STALL
■ TOKEN type identification
■ Address checking.
Hub Controller
The hub control block does the following protocol handling at a higher level:
■ Coordinate enumeration by responding to SETUP packets
■ Fill and empty the FIFOs
■ Suspend/Resume coordination
■ Verify and select DATA toggle values
■ Port power control and overcurrent detection.
The Hub controller provides status and control and permits host access to the hub.
Hub Repeater
The hub repeater manages the connectivity between upstream and downstream facing ports that are operating at the same speed. It supports full/low speed connectivity and
high speed connectivity. According to USB 2.0 specification, the hub repeater provides the following functions:
■ Sets up and tears down connectivity on packet boundaries
■ Ensures orderly entry into and out of the suspend state, including proper handling of remote wakeups.
Transaction Translator
The TT translates data from one speed to another. A TT takes high speed split transactions and translates them to full/low speed transactions when the hub is operating at high speed (the upstream port is connected to a high speed host controller) and has full/low speed devices attached. The operating speed of a device attached on a downstream facing port determines whether the routing logic connects a port to the transaction translator or hub repeater section. If a low or full speed device is connected to the hub operating at high speed, the data transfer route includes the transaction translator.
If a high speed device is connected to this high speed hub the route only includes the repeater and no transaction translator; the device and the hub are in conformation with respect to their data transfer speed. When the hub is operating at full speed (the upstream port is connected to a full speed host controller), a high speed peripheral does not operate at its full capability. These devices only work at 1.1 speed. Full and low speed devices connected to this hub operate at their 1.1 speed.
CY7C65640A主要应用:
■ Standalone Hubs
■ Motherboard Hubs
■ Monitor Hub applications
■ External Personal Storage Drives
■ Port Replicators
■ Portable Drive
■ Docking Stations
The TetraHub
TM is the highest performance USB 2.0 hub solution available. Cypress offers a complete reference design for developing a fixed function 4-port USB 2.0 Hub that is production ready and USB 2.0 compliant.
This single chip design is based on the CY7C65640-LFC, offering a space saving and cost effective package. Because it is USB 2.0 compliant it is fully backward compatible with USB 1.1 systems. It provides for up to four downstream ports, and supports High Speed, Full Speed and Low Speed traffic. No firmware development is required for this design, thereby reducing design risk and time-to-market.
Our Reference Design Kits include a fully functional demonstration board as well as all of the design materials you will need to expedite the development of your custom product. Cypress provides faster time-to-market and the lowest overall system cost with our TetraHub Reference Design.
图2.Tetrahub USB 2.0 4端口Hub参考设计方框图
Cypress offers a complete reference design for developing a fixed-function, 4-port USB 2.0 hub that is production ready and USB 2.0 compliant.
参考设计主要特性:
Compliance with USB 2.0
480/12/1.5-Mbps operation
4 transaction translators ("tetra" architecture)
56-lead QFN (quad flat no-lead) package
Integrated components
1.5K ohm pull-up resistor on D
15K ohm pull-down resistors on downstream ports
Individual or ganged port power switching and over current detection
Integrated phase-locked loop
Dedicated LED ports
The TetraHub reference design kit includes:
CY7C65640-based demonstration unit
5 VDC, 2.5A wall power supply
USB cable
Data sheet and design notes
Hardware files
Schematics
Bill of Materials
Gerber and OrCAD source files
图3.Tetrahub USB 2.0 4端口Hub应用框图
图4.Tetrahub USB 2.0 4端口Hub参考设计电路图
Tetrahub USB 2.0 4端口Hub参考设计材料清单(BOM):