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NS LMH6517 RD-179高IF亚取样接收方案

作者:  时间:2010-01-08 14:12  来源:
NS公司的RD-179高IF亚取样接收器子系统参考设计SP16160CH1RB采用ADC16DV160 ADC, LMH6517数控可变增益放大器(DVGA)和LMK04031B 精密时钟调理器,主要用在无线基础设备.本文主要介绍了LMH6517数控可变增益放大器(DVGA)主要特性,方框图和IF取样接收器应用电路以及RD-179高IF亚取样接收器子系统参考设计SP16160CH1RB主要特性,方框图和详细电路与所用材料清单.

LMH6517: Low Power, Low Noise, IF and Baseband, Dual 16 bit ADC Driver With Digitally Controlled Gain

The LMH6517 contains two high performance digitally controlled variable gain amplifiers (DVGA). It has been designed for use in narrowband and broadband IF sampling applications.

Typically the LMH6517 drives a high performance ADC in a broad range of mixed signal and digital communication applications such as mobile radio and cellular base stations where automatic gain control (AGC) is required to increase system dynamic range.

Each channel of LMH6517 has an independent digitally controlled attenuator and a high linearity, differential output amplifier. Each block has been optimized for low distortion and maximum system design flexibility. Each channel can be individually disabled for power savings.

The LMH6517 digitally controlled attenuator provides precise 0.5dB gain steps over a 31.5dB range. On chip digital latches are provided for local storage of the gain setting. Both serial and parallel programming options are provided. A Pulse mode is also offered where simple up or down commands can change the gain one step at a time.

The output amplifier has a differential output allowing large signal swings on a single 5V supply. The low impedance output provides maximum flexibility when driving filters or analog to digital converters.

The LMH6517 operates over the industrial temperature range of −40℃ to +85℃. The LMH6517 is available in a 32-Pin, thermally enhanced, LLP package.

LMH6517主要特性:

■ Accurate, 0.5dB gain steps

■ 200Ω Resistive, differential input

■ Low impedance, differential output

■ Disable function for each channel

■ Parallel gain control

■ SPI compatible serial bus

■ Two wire, Pulse Mode control

■ On chip register stores gain setting

■ Low sensitivity of linearity and phase to gain setting

■ Single 5V supply voltage

■ Small footprint LLP package

LMH6517主要指标:

■ OIP3: 44dBm @ 200MHz

■ Noise figure 5.5dB

■ Gain step size of 0.5dB

■ Gain step accuracy: 0.05dB

■ Frequency Range of 1200 MHz

■ Supply current 80mA per channel

LMH6517应用:

■ Cellular base stations

■ IF sampling receivers

■ Instrumentation

■ Modems

■ Imaging

图1.LMH6517方框图

图2.LMH6517 IF取样接收器应用电路

RD-179高IF亚取样接收器子系统参考设计SP16160CH1RB

RD-179: High-IF Subsampling Receiver Subsystem

The SP16160CH1RB demonstrates a high-IF sampling receiver subsystem that provides signal amplification, digitization and clocking as used in wireless infrastructure systems.

The subsystem includes the ADC16DV160 analog-to-digital converter (ADC), LMH6517 Digitally-controlled Variable-Gain Amplifier (DVGA) and LMK04031B precision clock conditioner.

In the signal path, the subsystem provides impedancematched, single-to-differential conversion through a 1:4 transformer and a 31.5 dB amplification gain range in 0.5 dB steps through the DVGA. The anti-aliasing filter at the output of the DVGA provides noise filtering and over 40 dB harmonic suppression by selecting the 20 MHz signal band centered at 192 Hz. The signal is then sampled and quantized by the ADC into 16-bit words using a 153.6 MHz CMOS clock.

In the clock path, a LMK04031B clock conditioning circuit operates with a 61.44 MHz reference oscillator and 76.8 Hz VCXO to provide the 153.6 MHz CMOS sampling clock. The clock output is also filtered and buffered to provide very low broadband noise for less than 200 fs total jitter over the clock input bandwidth of the ADC.

The measured system performance demonstrates a large signal SNR of 71 dBFS and SFDR greater than 80 dBFS for a -1 dBFS, 192 MHz input signal and a sampling frequency of 153.6 MSPS. For signals less than -6 dBFS, the SNR is greater than 72.7 dBFS and the SFDR is greater than 92 dBFS.

In a channel bandwidth of 200 kHz the subsystem achieves a small signal channel SNR greater than 99 dBFS enabling use in MC-GSM wireless communications receiver applications. In the presence of a -4 dBFS blocking signal that is 800 kHz from the channel center, the SP16160CH1RB achieves a SNR of 94 dBFS and SFDR of 90 dBFS in the channel.

Evaluation of this reference board is simplified with the Wave- Vision 5.1 Data Capture Board and WaveVision 5 software which enables data capture and analysis, as well as complete programmable configuration of the ADC16DV160 and LMH6517 via a common SPI bus. The LMK04031B is easily configured using a PIC Loader board that is included with the reference kit.

图3.SP16160CH1RB外形图

SP16160CH1RB主要特性:

Key Features of the SP16160CH1RB High-IF Sub-Sampling Receiver Reference Design Board

■ Demonstrates a high-IF sub-sampling subsystem architecture used in wireless infrastructure systems

■ Configured for a 20 MHz input bandwidth centered at 192 MHz

■ Configured with a low-noise, 153.6 MSPS CMOS sampling clock

■ Featured Products Include:

— ADC16DV160 dual 16-bit, 160 Megasample per second (MSPS) ADC with parallel LVDS outputs

— LMH6517 Digitally-controlled, Variable Gain Amplifier (DVGA) with 31.5 dB gain range in 0.5 dB steps

— LMK04031B low-jitter precision clock conditioner consisting of cascaded phase locked loops (PLLs), an internal voltage controlled oscillator (VCO) and a distribution stage

— Several energy-efficient power management ICs

■ Large-signal (-1 dBFS) performance for a 192 MHz input signal:

— SNR = 71 dBFS

— SFDR > 80 dBFS

■ Small-signal (-6 dBFS) performance for a 192 MHz input signal:

— SNR = 72.7 dBFS

— SFDR > 92 dBFS

■ 200 kHz channel performance for base-station receiver applications:

— SNR = 99 dBFS under normal conditions

— SNR = 94 dBFS under blocking conditions

— SFDR > 90dBFS under blocking conditions

■ Total integrated jitter < 200 fs

■ PIC Loader board included with reference board for quick and easy configuration of the LMK04031B

■ Compatible with the WaveVision 5.1 Data Capture Board and WaveVision 5 software for simplified evaluation

■ All internal register ADC and DVGA features can be exercised using the WaveVision 5 software

■ Board comes fully assembled and tested

■ Operates from a single (+5V) supply

图4.SP16160CH1RB方框图

图5.SP16160CH1RB电路图(1)

图6.SP16160CH1RB电路图(2)

图7.SP16160CH1RB电路图(3)

图8.SP16160CH1RB电路图(4)
SP16160CH1RB材料清单:


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LMH6517  RD-179  高IF  亚取样接收  2009-10-28
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