NXP 智能卡PN512 NFC发送解决方案

世界范围的智能卡正在迅猛发展,产量也在迅速增长.NXP的无接触ID卡能方便地对存储在电子媒体中的数据进行存取.它的13.56MHz智能卡阅读器和模块构成MIFARE接口平台的一部分,符合包括ISO 14443 A, ISO 14443 B 和ISO 15693在内的国际标准,容易设计,工作距离长达100毫米,提供RF数据通信加密.而PN512是高度集成的13.56MHz无接触通信收发器集成电路,具有先进的调制和解调性能,支持四种工作模式:

1) 支持ISO 14443A/Mifare 和FeliCa方案的读/写模式,

2) 支持ISO 14443B方案的读/写模式,

3) 支持ISO 14443A/Mifare 和FeliCa方案的卡工作模式,

4) NFCIP-1模式.

本解决方案给出了PN512的主要特性,方框图,以及读/写模式方框图, ISO 14443A/Mifare 读/写模式方框图, FeliCa 读/写模式方框图, NFCIP-1模式方框图和应用电路图.

The worlds smart card infrastructure is rapidly evolving and is set for a dramatic increase. In this dynamic environment, NXP Semiconductors helps minimize costs and design complexity by integrating all the necessary reader functionality onto one single chip. Backed by extensive support tools, including demo boards and software libraries, our reader ICs are extremely easy to design-in giving you maximum application flexibility.

Contactless identification provides convenient access to information stored in electronic media. Our 13.56 MHz smart card reader ICs and modules:

•form an integral part of the MIFARE Interface Platform, the industry standard for contactless and dual interface smart card schemes

•conform to international standards including ISO 14443 A, ISO 14443 B and ISO 15693

•are easy to design in

•operate up to 100mm

•offer optional RF data communication encryption

•enable new applications to be set up very simply using the MIFARE demo system

The PN512 is a highly integrated transceiver IC for contactless communication at 13.56 MHz. This transceiver IC utilizes an outstanding modulation and demodulation concept completely integrated for different kinds of contactless communication methods and protocols at 13.56 MHz.

The PN512 transceiver ICs support 4 different operating modes

•Reader/Writer mode supporting ISO 14443A/Mifare and FeliCa scheme

•Reader/Writer mode supporting ISO 14443B scheme

•Card Operation mode supporting ISO 14443A/Mifare and FeliCa scheme

•NFCIP-1 mode

Enabled in Reader/Writer mode for ISO 14443A/Mifare, the PN512’s internal transmitter part is able to drive a reader / writer antenna designed to communicate with ISO 14443A/ Mifare cards and transponders without additional active circuitry. The receiver part provides a robust and efficient implementation of a demodulation and decoding circuitry for signals from ISO 14443A/Mifare compatible cards and transponders. The digital part handles the complete ISO 14443A framing and error detection (Parity & CRC).

The PN512 supports Mifare Classic (e.g. Mifare Standard) products. The PN512 supports

contactless communication using Mifare higher transfer speeds up to 424 kbit/s in both
directions.

Enabled in Reader/Writer mode for FeliCa, the PN512 transceiver IC supports the FeliCa
communication scheme. The receiver part provides a robust and efficient implementation of the demodulation and decoding circuitry for FeliCa coded signals. The digital part handles the FeliCa framing and error detection like CRC. The PN512 supports contactless communication using FeliCa Higher transfer speeds up to 424 kbit/s in both directions.

The PN512 supports all layers of the ISO/IEC 14443B reader/writer communication scheme, given correct implementation of additional components, like oscillator, power supply, coil etc. and provided that standardised protocols, e.g. like ISO/IEC 14443-4 and/or ISO/IEC 14443B anticollision are correctly implemented.
In Card Operation mode, the PN512 transceiver IC is able to answer to a reader/writer command either according to the FeliCa or ISO 14443A/Mifare card interface scheme.

The PN512 generates the digital load modulated signals and in addition with an external
circuit the answer can be sent back to the reader/writer. A complete card functionality is
only possible in combination with a secure core IC using the S2C interface.

Additionally, the PN512 transceiver IC offers the possibility to communicate directly to an
NFCIP-1 device in the NFCIP-1 mode. The NFCIP-1 mode offers different communication
mode and transfer speeds up to 424 kbit/s according to the Ecma 340 and ISO/IEC 18092
NFCIP-1 Standard. The digital part handles the complete NFCIP-1 framing and error
detection.

Various host controller interfaces are implemented:

•8-bit parallel interface1

•SPI interface

•serial UART (similar to RS232 with voltage levels according pad voltage supply)

•I2C interface.

Pn512 Features:

Highly integrated analog circuitry to demodulate and decode responses
    
Buffered output drivers to connect an antenna with minimum number of external
Components
    
Integrated RF Level detector
    
Integrated data mode detector
    
ISO 14443A/Mifare support
    
ISO 14443B reader/writer support
    
Typical operating distance in Reader/Writer mode for communication to a ISO 14443A/Mifare or FeliCa card up to 50 mm depending on the antenna size, tuning and power supply
    
Typical operating distance in NFCIP-1 mode up to 50 mm depending on the antenna size and tuning and power supply
    
Typical operating distance in ISO 14443A/Mifare card or FeliCa Card Operation modeof about 100 mm depending on the antenna size and tuning and the external fieldstrength
    
Mifare Classic encryption in Reader/Writer mode support
    
ISO 14443 higher transfer speed communication at 212 kbit/s and 424 kbit/s
    
Contactless communication according to the FeliCa scheme at 212 kbit/s and 424 kbit/s
    
Integrated RF interface for NFCIP-1 up to 424 kbit/s
     
S2C interface
     
Supported host controller interfaces
     
SPI interface up to 10 Mbit/s
     
I2C interface up to 400 kbit/s in Fast mode, up to 3400 kbit/s in High-speed mode
    
serial UART in different transfer speeds up to 1228.8 kbit/s, framing according tothe RS232 interface with voltage levels according pad voltage supply

8-bit parallel interface with and without Address Latch Enable

Comfortable 64 byte send and receive FIFO-buffer

Flexible interrupt modes

Hard reset with low power function

Power-down mode per software

Programmable timer

Internal oscillator to connect 27.12 MHz quartz

2.5-3.6 V power supply

CRC Co-processor

Free programmable I/O pins

Internal self test
    
PN512 方框图:



Fig 2. 读/写模式方框图



Fig 3. ISO 14443A/Mifare 读/写模式方框图



Fig 4. FeliCa 读/写模式方框图



Fig 5.卡工作模式方框图



Fig 6. NFCIP-1模式方框图



The figure below shows a typical circuit diagram, using a complementary antenna
connection to the PN512. The antenna tuning and RF part matching is described in the application note PN512 transceiver IC; Antenna and RF Design Guide.

Fig 7. 典型应用电路