NS SDXILEVK三速SDI时钟方案

SDXILEVK TRIPLE-RATE SDI AND VIDEO CLOCKING DAUGHTER CARD
National Semiconductor in collaboration with Xilinx developed a triple-rate SDI and video clocking daughter card for the Xilinx Spartan-3A/3E development kits. The combined solution provides broadcast video system designers a comprehensive platform for rapid evaluation and prototyping of new designs to reduce time to market.
The 3G SDI SerDes evaluation system consists of:

Xilinx XtremeDSP starter platform Spartan-3A DSP 1800A edition (sold separately by Xilinx)
National SDI video and clocking daughter card (SDXILEVK)
SDXILEVK Schematics, Bill of Materials (BOM)
FPGA IP
Nationals daughter card, SDXILEVK, includes synthesizable FPGA source code available in both Verilog and VHDL to maximize flexibility and facilitate IP customization. The daughter card, available as an option, plugs directly into the Xilinx Spartan-3A/3E development boards via Xilinxs EXP connector.
The SDALTEVK daughter card contains:
LMH0344 Triple-rate SDI Adaptive Cable Equalizer
LMH0340 Triple-rate SDI Serializer with integrated cable driver
LMH0341 Triple-rate SDI deserializer with reclocked loop through
LMH1981 Multi-Format Video Sync Separator
LMH1982 Multi-Rate Video Clock Generator
DS25CP104 4x4 LVDS Crosspoint Switch
LP3878 Low Noise LDO

The SDXILEVK supports a complete 3G-SDI signal path consisting of adaptive cable equalizer (LMH0344), deserializer with reclocked loop through (LMH0341) and serializer with integrated cable driver (LMH0340). A multi-rate sync separator (LMH1981) and clock generator (LMH1982) deliver ultra-low jitter reference clocks to the host FPGA. A 4x4 LVDS crosspoint switch (DS25CP104) acts as a reference clock selector to choose between four separate clocking options:
Recovered clock from LMH0341 deserializer
Genlock from analog reference, LMH1981 sync separator and LMH1982 clock generator
Local clock generation from LMH1982 in free-run mode
External clock via SMA connector