SN65LVDS30x -可编程 27 位显示屏串行接口发送器
The SN65LVDS301 serializer device converts 27 parallel data inputs to 1, 2, or 3 Sub Low-Voltage Differential Signaling (SubLVDS) serial outputs. It loads a shift register with 24 pixel bits and 3 control bits from the parallel CMOS input interface. In addition to the 27 data bits, the device adds a parity bit and two reserved bits into a 30-bit data word. Each word is latched into the device by the pixel clock (PCLK). The parity bit (odd parity) allows a receiver to detect single bit errors. The serial shift register is uploaded at 30, 15, or 10 times the pixel-clock data rate depending on the number of serial links used. A copy of the pixel clock is output on a separate differential output.
特性
FlatLink™3G serial interface technology
Compatible with FlatLink3G receivers such as SN65LVDS302
Input supports 24-bit RGB video mode interface
24-Bit RGB Data, 3 Control Bits, 1 Parity Bit and 2 Reserved Bits Transmitted over 1, 2 or 3 Differential Lines
SubLVDS Differential Voltage Levels
Effective Data Throughput up to 1755 Mbps
Three Operating Modes to Conserve Power
Active-Mode QVGA 17.4 mW (typ)
Active-Mode VGA 28.8 mW (typ)
Shutdown Mode 0.5 µA (typ)
Standby Mode 0.5 µA (typ)
Bus Swap for Increased PCB Layout Flexibility
1.8-V Supply Voltage
ESD Rating >: 2 kV (HBM)
Typical Application: Host-Controller to Display-Module Interface
Pixel Clock Range of 4 MHz-65 MHz
Failsafe on all CMOS Inputs
Packaging: 80 Pin 5mm × 5mm µBGA®
Very low EMI meets SAE J1752/3 'M'-spec
FlatLink is a trademark of Texas Instruments.
µBGA is a registered trademark of Tessera, Inc.
TLV320AIC3104 -具有 6 输入、4 输出的耳机放大器与增强数字效果的低功耗立体声编解码器
The TLV320AIC3104 is a low-power stereo audio codec with stereo headphone amplifier, as well as multiple inputs and outputs that are programmable in single-ended or fully differential configurations. Extensive register-based power control is included, enabling stereo 48-kHz DAC playback as low as 14 mW from a 3.3-V analog supply, making it ideal for portable battery-powered audio and telephony applications.
特性
Stereo Audio DAC
100-dBA Signal-to-Noise Ratio
16/20/24/32-Bit Data
Supports Sample Rates From 8 kHz to 96 kHz
3D/Bass/Treble/EQ/De-Emphasis Effects
Flexible Power Saving Modes and Performance are Available
Stereo Audio ADC
92-dBA Signal-to-Noise Ratio
Supports Sample Rates From 8 kHz to 96 kHz
Digital Signal Processing and Noise Filtering Available During Record
Six Audio Input Pins
One Stereo Pair of Single-Ended Inputs
One Stereo Pair of Fully Differential Inputs
Six Audio Output Drivers
Stereo Fully Differential or Single-Ended Headphone Drivers
Fully Differential Stereo Line Outputs
Low Power: 14-mW Stereo 48-kHz PlaybackWith 3.3-V Analog Supply
Ultralow-Power Mode with Passive Analog Bypass
Programmable Input/Output Analog Gains
Automatic Gain Control (AGC) for Record
Programmable Microphone Bias Level
Programmable PLL for Flexible Clock Generation
I2C Control Bus
Audio Serial Data Bus Supports I2S, Left/Right-Justified, DSP, and TDM Modes
Extensive Modular Power Control
Power Supplies:
Analog: 2.7 V-3.6 V.
Digital Core: 1.525 V-1.95 V
Digital I/O: 1.1 V-3.6 V
Package: 5-mm × 5-mm 32-Pin QFN
APPLICATIONS
Digital Cameras
Smart Cellular Phones
PDAs
Portable Computing
Communication
Entertainment Applications
手持终端 – 信号链结构图
TLV320AIC3106 -具有 10 输入、7 输出、耳机 放大器与增强数字效果的低功耗立体声编解码器
The TLV320AIC3106 is a low power stereo audio codec with stereo headphone amplifier, as well as multiple inputs and outputs programmable in single-ended or fully differential configurations. Extensive register- based power control is included, enabling stereo 48-kHz DAC playback as low as 15 mW from a 3.3-V analog supply, making it ideal for portable battery-powered audio and telephony applications.
特性
Stereo Audio DAC
102-dBA Signal-to-Noise Ratio
16/20/24/32-Bit Data
Supports Rates From 8 kHz to 96 kHz
3D/Bass/Treble/EQ/De-Emphasis Effects
Flexible Power Saving Modes and Performance are Available
Stereo Audio ADC
92-dBA Signal-to-Noise Ratio
Supports Rates From 8 kHz to 96 kHz
Digital Signal Processing and Noise Filtering Available During Record
Ten Audio Input Pins
Programmable in Single-Ended or Fully Differential Configurations
3-State Capability for Floating Input Configurations
Seven Audio Output Drivers
Stereo Fully Differential or Single-Ended Headphone Drivers
Fully Differential Stereo Line Outputs
Fully Differential Mono Output
Low Power: 15-mW Stereo 48-kHz PlaybackWith 3.3-V Analog Supply
Ultra-Low Power Mode with Passive Analog Bypass
Programmable Input/Output Analog Gains
Automatic Gain Control (AGC) for Record
Programmable Microphone Bias Level
Programmable PLL for Flexible Clock Generation
Control Bus Selectable SPI or I2C
Audio Serial Data Bus Supports I2S, Left/Right-Justified, DSP, and TDM Modes
Alternate Serial PCM/I2S Data Bus for Easy Connection to Bluetooth™ Module
Concurrent Digital Microphone and Analog Microphone Support Available
Extensive Modular Power Control
Power Supplies:
Analog: 2.7 V-3.6 V.
Digital Core: 1.525 V-1.95 V
Digital I/O: 1.1 V-3.6 V
Packages: 5 × 5 mm 80-VFBGA; 7 × 7 mm 48-QFN (Future Product)
APPLICATIONS
Digital Cameras
Smart Cellular Phones
MicroStar Junior is a trademark of Texas Instruments.
Bluetooth is a trademark of Bluetooth SIG, Inc.
TLV320DAC32 -具有 4 输出、耳机/扬声器放大器与 3D 音效的低功耗立体声 DAC
The TLV320DAC32 is a low power stereo audio DAC with and integrated power amplifier designed to drive stereo headphones or speakers. This device also has a pair of analog inputs which allow routing of external signals to the output amplifiers. The playback path includes a mix/mux capability from the stereo DAC and analog inputs, through programmable volume controls, to the headphone outputs. Extensive register-based power control is included, enabling stereo 96-kHz playback as low as 20mW from a 3.3-V analog supply, making it ideal for portable battery-powered audio and telephony applications.
特性
Stereo Audio DAC
95-dBA Signal-to-Noise Ratio
16/20/24/32-Bit Data
Supports Rates From 8 kHz to 96 kHz
3D/Bass/Treble/EQ/De-emphasis Effects
Two Audio Input Pins
Allows Analog Bypass Path
Four Audio Output Drivers
Stereo 8- , 500-mW/Channel SpeakerDrive Capability
Stereo Fully Differential or Single-Ended Headphone Drivers
Low Power: 18-mW Stereo 48-kHz Playback With 3.3-V Analog Supply
Programmable Input/Output Analog Gains
Programmable Microphone Bias Level
Headphone Jack Detection
Programmable PLL for Flexible Clock Generation
I2C Control Bus
Audio Serial Data Bus Supports I2S, Left/Right-Justified, DSP, and TDM Modes
Extensive Modular Power Control
Internal Selectable LDO Allows Operation From Single 3.3-V Supply
Power Supplies:
Analog: 2.7 V-3.6 V.
Digital Core: 1.525 V-1.95 V
Digital I/O: 1.1 V-3.6 V
Package: 5 × 5 mm 32-QFN
TPA2006D1/32D1 -具有 1.8V 兼容关断电压的 1.45W 单声道免滤波 D 类音频放大器
The TPA2006D1 is a 1.45-W high efficiency filter-free class-D audio power amplifier in a 3 mm × 3 mm QFN package that requires only three external components. The SHUTDOWN pin is fully compatible with 1.8-V logic GPIO, such as are used on low power cellular chipsets.
特性
Maximum Battery Life and Minimum Heat
Efficiency With an 8- Speaker:
88% at 400 mW
80% at 100 mW
2.8-mA Quiescent Current
0.5-µA Shutdown Current
Shutdown Pin has 1.8-V Compatible Thresholds
Only Three External Components
Optimized PWM Output Stage Eliminates LC Output Filter
Internally Generated 250-kHz Switching Frequency Eliminates Capacitor and Resistor
Improved PSRR (-75 dB) and Wide Supply Voltage (2.5 V to 5.5 V) Eliminates Need for a Voltage Regulator
Fully Differential Design Reduces RF Rectification and Eliminates Bypass Capacitor
Improved CMRR Eliminates Two Input Coupling Capacitors
Space Saving 3 mm x 3 mm QFN Package (DRB)
APPLICATIONS
Ideal for Wireless or Cellular Handsets and PDAs
TPA6130A2 - 100mW 耳机驱动器
The TPA6130A2 is a stereo DirectPath™ headphone amplifier with I2C digital volume control. The TPA6130A2 has minimal quiescent current consumption, with a typical IDD of 4 mA, making it optimal for portable applications. The I2C control allows maximum flexibility with a 64 step audio taper volume control, channel independent enables and mutes, and the ability to configure the outputs into stereo, dual mono, or a single receiver speaker BTL amplifier that drives 300 mW
特性
DirectPath Ground-Referenced Outputs
Eliminates Output DC Blocking Capacitors
Reduces Board Area
Reduces Component Height and Cost
Full Bass Response Without Attenuation
Power Supply Voltage Range: 2.5 V to 5.5 V
64 Step Audio Taper Volume Control
High Power Supply Rejection Ratio (>100 dB PSRR)
Differential Inputs for Maximum Noise Rejection (68 dB CMRR)
High-Impedance Outputs When Disabled
Advanced Pop and Click Suppression Circuitry
Digital I2C Bus Control
Per Channel Mute and Enable
Software Shutdown
Multi-Mode Support: Stereo HP, Dual Mono HP, and Single-Channel BTL Operation
Amplifier Status
Space Saving Lead-Free (Pb-Free) Packages
20 Pin, 4 mm x 4 mm QFN
16 ball, 2 mm x 2 mm WCSP
ESD Protection of 8 kV HBM and IEC Contact
APPLICATIONS
Mobile Phones
Portable Media Players
Notebook Computers
High Fidelity Applications
DirectPath is a trademark of Texas Instruments.
TPA6205A1 – 1.7W AB 类音频功率放大器
The TPA6205A1 is a 1.25-W mono fully differential amplifierdesigned to drive a speaker with at least 8- impedance while consuming less than 37 mm2 (ZQV package option) total printed-circuit board (PCB) area in most applications. This device operates from 2.5 V to 5.5 V, drawing only 1.7 mA of quiescent supply current. The TPA6205A1 is available in the space-saving 2 mm x 2 mm MicroStar Junior™ BGA package, and the space saving 3 mm x 3 mm QFN (DRB) package.
特性
1.25 W Into 8 From a5-V Supply at THD = 1% (Typical)
Shutdown Pin has 1.8V Compatible Thresholds
Low Supply Current: 1.7mA Typical
Shutdown Current < 10µA
Only Five External Components
Improved PSRR (90 dB) and Wide Supply Voltage (2.5V to 5.5V) for Direct Battery Operation
Fully Differential Design Reduces RF Rectification
Improved CMRR Eliminates Two Input Coupling Capacitors
C(BYPASS) Is Optional Due to Fully Differential Design and High PSRR
Available in 3 mm x 3 mm QFN Package (DRB)
Available in an 8-Pin PowerPAD™ MSOP (DGN)
Avaliable in a 2 mm x 2 mm MicroStar Junior™ BGA Package (ZQV)
APPLICATIONS
Designed for Wireless Handsets, PDAs, and other mobile devices
Compatible with Low Power (1.8V Logic) I/O Threshold control signals
PowerPAD, MicroStar Junior are trademarks of Texas Instruments.
TSC2007 -具有 I²C 总线的 1.2V-3.6V、12 位 200KSPS 低成本、毫微瓦功耗触摸屏控制器
The TSC2007 is a very low-power touch screen controller designed to work with power-sensitive, handheld applications that are based on an advanced low-voltage processor. It works with a supply voltage as low as 1.2V, which can be supplied by a single-cell battery. It contains a complete, ultra-low power, 12-bit, analog-to-digital (A/D) resistive touch screen converter, including drivers and the control logic to measure touch pressure.
特性
4-Wire Touch Screen Interface
Single 1.2V to 3.6V Supply/Reference
Ratiometric Conversion
Effective Throughput Rate:
Up to 20kHz (8-Bit) or 10kHz (12-Bit)
Preprocessing to Reduce Bus Activity
I2C™ Interface Supports:
Standard, Fast, and High-Speed Modes
Simple, Command-Based User Interface:
TSC2003 Compatible
8- or 12-Bit Resolution
On-Chip Temperature Measurement
Touch Pressure Measurement
Digital Buffered PENIRQ
On-Chip, Programmable PENIRQ Pullup
Auto Power-Down Control
Low Power:
32.24µA at 1.2V, Fast Mode, 8.2kHz Eq Rate
39.31µA at 1.8V, Fast Mode, 8.2kHz Eq Rate
53.32µA at 2.7V, Fast Mode, 8.2kHz Eq Rate
Enhanced ESD Protection:
±8kV HBM
±1kV CDM
±25kV Air Gap Discharge
±15kV Contact Discharge
1.5 x 2 WCSP-12 and 5 x 6.4 TSSOP-16 Packages
APPLICATIONS
Cellular Phones
PDA, GPS, and Media Players
Portable Instruments
Point-of-Sale Terminals
Multiscreen Touch Control
U.S. Patent NO. 6246394; other patents pending.
I2C is a trademark of NXP Semiconductors.
All other trademarks are the property of their respective owners.