LOGIC Devices Introduces Flexible Video Frame Buffer

LOGIC Devices (Nasdaq: LOGC), adeveloper of high performance application specific integrated circuits, today announced ithas begun sampling its LF3312 Frame Buffer / FIFO. The device provides designerswith the most flexible memory solution to buffering multiple video formats, using bothsequential and random access. By integrating both high-density 12Mbit memory andadvanced addressing control logic, the LF3312 simplifies the design of current video anddata buffering systems typically using standard synchronous Random Access Memories(RAM) paired with Field Programmable Gate Array (FPGA) logic.
The LF3312 features up to four data ports and several addressing modes, allowing thememory to be accessed sequentially, through random access, or both. Flexibleaddressing allows the device to perform First-In First-Out (FIFO), Shift Register,Synchronization, and mixed Sequential/Random Access functions. With just over12.4Mbits of memory and a maximum data rate of 83MHz, the LF3312 can buffermultiple video formats, including HDTV. Devices can be cascaded to enable largerword-widths or depths. A seamless address space is maintained in the Random Accessmode, even when cascading multiple devices for high-resolution images. Memory can beallocated as a single 12.4Mbit array using two data ports, or as two independentlycontrolled 6Mbit memory arrays using four data ports. Two independent memory arraysenable multi-channel applications, such as buffering Luma and Chroma videocomponents or multi-channel synchronization. The Input/Output word widths areconfigurable to 8, 10, 12, 16, 20 or 24bits without wasting memory.
The LF3312 is mainly targeted towards security surveillance systems, broadcast videoequipment, medical imaging, machine vision, and video editing systems. The deviceconfigurability, along with its 83MHz operating speed, provides the designer withunprecedented flexibility in numerous applications that require storage density, speed,and flexible addressing. The FIFO and Shift Register modes are useful in synchronizingmultiple video streams or data feeds, frame synchronization, motion detection, scan rateconversion, motion adaptive de-interlacing, and time base correction (TBC). TheRandom Access modes facilitate complex addressing schemes such as multi-queuebuffering, video compression algorithms, image rotation, area of interest (AOI), andpicture in picture (PIP) extraction.
The LF3312 is packaged in a 15mm x 15mm small form factor 172-pin Low Profile BallGrid Array (LBGA) package. The package will be available in a lead-free (Pb-free)
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version, which meets the joint IPC/JEDEC standard J-STD-020B and complies with European Union requirements scheduled to take effect in 2005.
Pricing and Availability
Commercial temperature grade production samples of the LF3312 are immediatelyavailable. Initial pricing for the LF3312 is $25 each in quantities of 10,000. Informationincluding the complete datasheet, application notes, and package drawings are availableonline at: http://www.logicdevices.com/ps/fifo/lf3312.htm. Print-quality photos for newsrelease purposes are available at http://www.logicdevices.com/ps/fifo/lf3312photos.htm.
About LOGIC Devices
LOGIC Devices Incorporated (Nasdaq: LOGC) is focused on developing highperformance digital integrated circuits for applications requiring high-density embeddedmemory, high speed and low power consumption. LOGIC Devices’ product solutionsmeet the requirements of leading broadcast video, medical imaging, surveillance,instrumentation, and telecommunications companies. More information about LOGICDevices is available at www.logicdevices.com.
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