IR IRS2530D三级调光CFL镇流器方案

IR公司的IRS2530D是全特性的调光镇流器控制和半桥驱动器,可以实现简单的单片高性能调光镇流器解决方案.它采用闭环灯丝电流调光控制,内部具有非ZVS保护和峰值因子保护,预热时间可编程.本文主要介绍了IRS2530D主要特性和镇流器系统的主要特性, IRS2530D方框图,以及采用IRS2530D的IRPLCFL8U电路图和材料清单(BOM).

IRS2530D takes full advantage of IR’s patented ballast and high-voltage technologies to realize a simple, high-performance dimming ballast solution. A single high-voltage pin senses the half-bridge current and voltage to perform necessary ballast protection functions. The DC dim input voltage reference and the AC lamp current feedback have been coupled together allowing a single pin to be used for dimming. Combining these high-voltage control algorithms together with a simple dimming method in a single 8-pin IC results in a large reduction in component count, an increase in manufacturability and reliability, a reduced design cycle time, while maintaining high dimming ballast system performance

IRS2530D主要特性:
Dimming ballast control plus half-bridge driver
Closed-loop lamp current dimming control
Internal non-ZVS protection
Internal crest factor protection
Programmable preheat time
Fixed dead-time (2.0μs typ.)
Lamp insert auto-restart
Internal bootstrap MOSFET
Internal 15.6V zener clamp diode on Vcc
Micropower startup (250μA)
Latch immunity and ESD protection

镇流器系统特性:
Single chip dimming solution
Simple lamp current dimming control method
Single lamp current sensing resistor required
No half-bridge current-sensing resistor required
No external protection circuits required (fully internal)
Flash-free lamp start at all dimming levels
Large reduction in component count
Easy to use for fast design cycle time
Increased manufacturability and reliability

典型应用:
Linear dimming ballast (down to 10%)
3-way dimming ballast
Multi-level switch dimming ballast



图1.IRS2530D方框图



图2.IRS2530D典型应用连接图

采用IES2530D的简化三级调光CFL镇流器主要特性:

Simplified Three Level Dimming CFL Fluorescent Ballast using the IRS2530D

Features
Drives 1 x 32W Spiral CFL Lamp
Input Voltage: 120Vac
High Frequency Operation
Lamp Filament Preheating
Lamp Fault Protection with Auto-Restart
Low AC Line/Brownout Protection
IRS2530D DIM8TM HVIC Ballast Controller



图3. 三级调光CFL镇流器外形图



图4.三级调光灯丝系统



图5.采用IR2156的IRRLCFL4电路图



图6.采用IRS2530D的IRPLCFL8U电路图

The IRS2530D design utilizes a voltage doubler at the front end in all modes of operation
giving a fixed DC bus voltage approximately 300V. By correctly selecting value of the
snubber capacitor it is not difficult to achieve soft switching in all modes of operation.

The front end of the IRPLCFL8U ballast circuit shows the neutral line input (i.e. the one
that is always connected) connected to the center point of the DC bus storage capacitors
C3 and C4. Live inputs L1 and L2 are connected to two completely separate voltage
doubler diode pairs which are connected to the DC bus. These four diodes are all
contained within the bridge BR1 (This is shown as D1, D2, D3 and D4 in the schematic of
Fig 6). If live input L1 is connected to the line, a 60Hz sinusoidal AC voltage will be present at the point where the anode of D1 joins the cathode of D3. This voltage will swing
between the 300V DC bus voltage and the 0V COM point of the circuit. If live input L1 is
not connected to the line this point will be floating with only residual voltage present. The
same applies with live input L2 at the point where the anode of D2 meets the cathode of
D4. These two points are fed via resistors R5 and R6 to the parallel combination of R7 and
C5, which are connected to 0V COM. The value of C5 is high enough to ensure that the
amount of ripple that is present at the junction of C5 and RDIM will be negligible so a DC
voltage will effectively appear there. This sets the reference voltage level for the dimming
feedback loop.
As a result this dimming control voltage will change depending on whether live input L1 is
connected only, live input L2 is connected only or both are connected, which depends on
the three way dimming rotary switch position. The values of R5 and R6 will be chosen so
that this voltage is substantially different if either live input L1 of live input L2 are
connected alone and these values are selected to set the desired low and mid light levels.
In this application R5 can be selected to give the correct reference voltage to provide 50%
light output as perceived by the human eye, which occurs at a point somewhat lower than
50% ballast power and R6 can be chosen for 75% which is at about 50% of the nominal
total ballast power at full light output.
The design problem overcome here is that the dimming control voltage obtained through
R5 and R6, where the values have been selected to provide minimum and medium light
outputs, is not sufficiently high to provide maximum light output when both live inputs are
connected. This being the case it was necessary to add the two pull up transistors Q1 and
Q2. When both inputs L1 and L2 are connected, i.e. when the rotary switch is in the fully
on position, the voltage at RDIM will be pulled high enough to ensure that the ballast
operates at maximum output since the transistors Q1 and Q2 will both be switched on in
this case.
Q1 and Q2 are small signal NPN devices, however they need to be rated to 300V VCEO
to prevent any conduction if either one is switched off. The zener diode DZ1 had been
added to ensure that Q1 and Q2 can fully switch off. This is because even when not
connected to the line some voltage appears at the bases of these devices. Since Q1 and
Q2 are configured as emitter followers the base voltage must exceed the breakdown
voltage of DZ1 (68V) in order to switch on, which can only occur when the corresponding
line input is connected through the rotary switch.

IRPLCFL8U 材料清单(BOM):